參數(shù)資料
型號： TMX320C6412GNZ
廠商： Texas Instruments, Inc.
英文描述： Signal Processor
中文描述： 信號處理器
文件頁數(shù)： 52/159頁
文件大?。?/td> 1989K
代理商： TMX320C6412GNZ
Device Configurations
52
April 2003 Revised June 2004
SPRS219D
2
Device Configurations
On the C6412 device, bootmode and certain device configurations/peripheral selections are determined at
device reset, while other device configurations/peripheral selections are software-configurable via the
peripheral configurations register (PERCFG) [address location 0x01B3F000] after device reset.
Peripheral Selection at Device Reset
2.1
Some C6412 peripherals share the same pins (internally muxed) and are mutually exclusive (i.e., HPI,
general-purpose input/output pins GP0[15:9], PCI and its internal EEPROM, EMAC, and MDIO). Other C6412
peripherals (i.e., the Timers, I2C0, and the GP0[7:0] pins), are always available.
HPI, GP0[15:9], PCI, EEPROM (internal to PCI), and EMAC peripherals
The PCI_EN and MAC_EN pins are latched at reset. They determine specific peripheral selection,
summarized in Table 21.
Table 21. PCI_EN, HD5, and MAC_EN Peripheral Selection (HPI, GP0[15:9], PCI, EMAC, and MDIO)
PERIPHERAL SELECTION
PERIPHERALS SELECTED
PCI_EN
Pin [E2]
PCI_EEAI
Pin [L5]
HD5
Pin [Y1]
MAC_EN
Pin [C5]
HPI Data
Lower
HPI Data
Upper
32-Bit PCI
EEPROM
(Auto-Init)
EMAC and
MDIO
GP0[15:9]
0
0
0
0
√
√
√
Hi-Z
Disabled
N/A
Disabled
√
Disabled
√
√
√
√
√
0
0
0
1
Hi-Z
√
Disabled
N/A
0
0
1
0
Disabled
N/A
0
0
1
1
Disabled
Disabled
N/A
1
1
X
X
Disabled
√
Enabled
(via External
EEPROM)
Disabled
Disabled
1
0
X
X
Disabled
√
Disabled
(default values)
Disabled
Disabled
If the PCI is disabled (PCI_EN = 0), the HPI peripheral is enabled and based on the HD5 and MAC_EN
pin configuration at reset, HPI16 mode or EMAC and MDIO can be selected. When the PCI is disabled
(PCI_EN = 0), the GP0[15:9] pins can also be programmed as GPIO, provided the GPxEN and GPxDIR
bits are properly configured.
This means all multiplexed HPI/PCI pins function as HPI and all standalone PCI pins (PCBE0 and
XSP_CS) are tied-off (Hi-Z). Also, the multiplexed GP0/PCI pins can be used as GPIO with the
proper
software configuration of the GPIO enable and direction registers (for more details, see Table 29).
If the PCI is enabled (PCI_EN = 1), the HPI peripheral is disabled.
This means all multiplexed HPI/PCI pins function as PCI. Also, the multiplexed GP0/PCI pins function
as
PCI pins (for more details, see Table 29).
The MAC_EN pin, in combination with the PCI_EN and HD5 pins, controls the selection of the EMAC and
MDIO peripherals (for more details, see Table 22).
The PCI_EN pin (= 1) and the PCI_EEAI pin control the whether the PCI initializes its internal registers
via external EEPROM (PCI_EEAI = 1) or if the internal default values are used instead (PCI_EEAI = 0).
Table 22. HPI vs. EMAC Peripheral Pin Selection
CONFIGURATION SELECTION
PERIPHERALS SELECTED
GP0[0]
Pin [M5]
HD5
Pin [Y1]
MAC_EN
Pin [C5]
HD[15:0]
HD[31:16]
0
0
0
HPI16
Hi-Z
0
0
1
HPI16
used for EMAC
0
1
0
HPI32 (HD[31:0])
0
1
1
Hi-Z
used for EMAC
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