參數(shù)資料
型號： TMX320C6412GNZ
廠商： Texas Instruments, Inc.
英文描述： Signal Processor
中文描述： 信號處理器
文件頁數(shù)： 46/159頁
文件大?。?/td> 1989K
代理商： TMX320C6412GNZ
Interrupt Sources and Interrupt Selector
46
April 2003 Revised June 2004
SPRS219D
1.9
Interrupt Sources and Interrupt Selector
The C64x DSP core supports 16 prioritized interrupts, which are listed in Table 125. The highest-priority
interrupt is INT_00 (dedicated to RESET) while the lowest-priority interrupt is INT_15. The first four interrupts
(INT_00INT_03) are non-maskable and fixed. The remaining interrupts (INT_04INT_15) are maskable and
default to the interrupt source specified in Table 125. The interrupt source for interrupts 415 can be
programmed by modifying the selector value (binary value) in the corresponding fields of the Interrupt Selector
Control registers: MUXH (address 0x019C0000) and MUXL (address 0x019C0004).
Table 125. C6412 DSP Interrupts
CPU
INTERRUPT
NUMBER
INTERRUPT
SELECTOR
CONTROL
REGISTER
SELECTOR
VALUE
(BINARY)
INTERRUPT
EVENT
INTERRUPT SOURCE
INT_00
INT_01
INT_02
INT_03
INT_04
INT_05
INT_06
INT_07
INT_08
INT_09
INT_10
INT_11
INT_12
INT_13
INT_14
INT_15
RESET
NMI
Reserved
Reserved. Do not use.
Reserved
Reserved. Do not use.
MUXL[4:0]
00100
GPINT4/EXT_INT4
GP0 interrupt 4/External interrupt pin 4
MUXL[9:5]
00101
GPINT5/EXT_INT5
GP0 interrupt 5/External interrupt pin 5
MUXL[14:10]
00110
GPINT6/EXT_INT6
GP0 interrupt 6/External interrupt pin 6
MUXL[20:16]
00111
GPINT7/EXT_INT7
GP0 interrupt 7/External interrupt pin 7
MUXL[25:21]
01000
EDMA_INT
EDMA channel (0 through 63) interrupt
MUXL[30:26]
01001
EMU_DTDMA
EMU DTDMA
MUXH[4:0]
00011
SD_INTA
EMIFA SDRAM timer interrupt
MUXH[9:5]
01010
EMU_RTDXRX
EMU real-time data exchange (RTDX) receive
MUXH[14:10]
01011
EMU_RTDXTX
EMU RTDX transmit
MUXH[20:16]
00000
DSP_INT
HPI/PCI-to-DSP interrupt
MUXH[25:21]
00001
TINT0
Timer 0 interrupt
MUXH[30:26]
00010
TINT1
Timer 1 interrupt
01100
XINT0
McBSP0 transmit interrupt
01101
RINT0
McBSP0 receive interrupt
01110
XINT1
McBSP1 transmit interrupt
01111
RINT1
McBSP1 receive interrupt
10000
GPINT0
GP0 interrupt 0
10001
Reserved
Reserved. Do not use.
10010
Reserved
Reserved. Do not use.
10011
TINT2
Timer 2 interrupt
10100
Reserved
Reserved. Do not use.
10101
Reserved
Reserved. Do not use.
10110
ICINT0
I2C0 interrupt
10111
Reserved
Reserved. Do not use.
11000
EMAC_MDIO_INT
EMAC/MDIO interrupt
11001 11111
Reserved
Reserved. Do not use.
Interrupts INT_00 through INT_03 are non-maskable and fixed.
Interrupts INT_04 through INT_15 are programmable by modifying the binary selector values in the Interrupt Selector Control registers fields.
Table 125 shows the default interrupt sources for Interrupts INT_04 through INT_15. For more detailed information on interrupt sources and
selection, see the
TMS320C6000 DSP Interrupt Selector Reference Guide
(literature number SPRU646).
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