參數(shù)資料
型號: TMX320C6412GNZ
廠商: Texas Instruments, Inc.
英文描述: Signal Processor
中文描述: 信號處理器
文件頁數(shù): 29/159頁
文件大小: 1989K
代理商: TMX320C6412GNZ
Memory Map Summary
29
April 2003 Revised June 2004
SPRS219D
1.6.1
L2 Architecture Expanded
Figure 15 shows the detail of the L2 architecture on the TMS320C6412 device. For more information on the
L2MODE bits, see the cache configuration (CCFG) register bit field descriptions in the
TMS320C64x
Two-Level Internal Memory
Reference Guide
(literature number SPRU610).
0x0000 0000
011
010
001
111
0x0002 0000
000
L2MODE
L2 Memory
Block Base Address
0x0003 8000
0x0003 0000
0x0004 0000
3
(
6
1
2
2
2
1
1
128K-Byte SRAM
64K-Byte RAM
32K-Byte RAM
0x0003 FFFF
32K-Byte RAM
Figure 15. TMS320C6412 L2 Architecture Memory Configuration
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