參數(shù)資料
型號： TMX320C6412GNZ
廠商： Texas Instruments, Inc.
英文描述： Signal Processor
中文描述： 信號處理器
文件頁數(shù)： 4/159頁
文件大小： 1989K
代理商： TMX320C6412GNZ
Revision History
4
April 2003 Revised June 2004
SPRS219D
PAGE(s)
NO.
ADDS/CHANGES/DELETES
34
Peripheral Register Descriptions section:
EDMA Parameter RAM (C64x) table:
Updated the ending address of Reload/link parameters for Event 21 (6 words) from “01A0
07FF
” to “01A0
080F
”
Updated the starting and ending address of Reload/link parameters for Event 22 (6 words) from “01A0
0800
01A0
0817
”
“01A0
0810
01A0
0827
”
Updated associated table footnote from “The C64x device ...” to “The
C6412
device ...”
35
Updated Ethernet MAC (EMAC) Control Registers table
38
Updated EMAC Statistics Registers table
41
HPI Registers table:
Split the “Reserved” row between hex address range “0188 0001 018B FFFF”
Added the HPI transfer request control register (HPI_TRCTL) to the hex address location 018A 0000
42
PCI Peripheral Registers table:
Address location 01C3 0000: changed “PCI_TRC
N
TL” to “PCI_TRCTL”
43
Updated MDIO Registers table
58
JTAG ID Register Description section:
Changed the JTAG ID register address location from “0x01B3 F00
4
” to “0x01B3 F00
8
”
7476
Terminal Functions table,
RESERVED FOR TEST
section:
Updated/changed the following C6412 RSV SIGNAL NAMEs to include their TYPE, and IPD/IPU column
information:
E14
I IPD;
H7
A —;
R6
A —;
W7
A —;
AA3
A —;
AB3
I —;
AC4
O/Z —;
AD3
O/Z —; and
AF3
O IPU
7780
Terminal Functions table,
SUPPLY VOLTAGE PINS
section:
Updated the “SUPPLY VOLTAGE PINS” description to include the A-500 extended temperature device
Added “(see the Power-Supply Decoupling section of this data manual)” reference to the DVDD and CVDD supply voltage
pins DESCRIPTION
87
Updated Device and Development-Support Tool Nomenclature section
89
Documentation Support section:
Added the
“TMS320C6412 Power Consumption Summary
application report (literature number SPRA967)” reference
91
Figure 28, External PLL Circuitry for Either PLL Multiply Modes or x1 (Bypass) Mode:
Deleted “L2 Clock” from the /2 outputs
95
EMAC section:
Updated paragraph about referencing SPRU628
96
MDIO section:
Updated paragraph about referencing SPRU628
98
Power-Down Modes Logic section:
Added the “Power-Down Modes Logic” section before the
Power-Supply Sequencing
section
103
IEEE 1149.1 JTAG Compatibility Statement section:
Added the “RESET must be released only in order for boundary-scan JTAG to read the variant field of IDCODE correctly.
Other boundary-scan instructions work correctly independent of current state of RESET.” paragraph
105
Absolute Maximum Ratings Over Operating Case Temperature Range section:
Added Package Temperature Cycling data
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