參數(shù)資料
型號(hào)： TMX320C6412GNZ
廠商： Texas Instruments, Inc.
英文描述： Signal Processor
中文描述： 信號(hào)處理器
文件頁數(shù)： 53/159頁
文件大?。?/td> 1989K
代理商： TMX320C6412GNZ
Device Configurations
53
April 2003 Revised June 2004
SPRS219D
2.2
Device Configuration at Device Reset
Table 23 describes the C6412 device configuration pins, which are set up via external pullup/pulldown
resistors through the specified EMIFA address bus pins (AEA[22:19]), and the TOUT1/LENDIAN,
GP0[3]/PCIEEAI, and the HD5 pins (all of which are latched during device reset).
Table 23. C6412 Device Configuration Pins (
TOUT1/
LENDIAN, AEA[22:19],
GP0[3]
/PCIEEAI,
GP0[8]/
PCI66, HD5
/AD5
, PCI_EN
, and TOUT0/
MAC_EN)
CONFIGURATION
PIN
NO.
FUNCTIONAL DESCRIPTION
TOUT1/
LENDIAN
B5
Device Endian mode (LEND)
0
–
System operates in Big Endian mode
1
System operates in Little Endian mode (default)
AEA[22:21]
[U23,
V24]
Bootmode [1:0]
00 –
01
10
11
No boot (default mode)
HPI/PCI boot (based on PCI_EN pin)
Reserved
EMIFA boot
AEA[20:19]
[V25,
V26]
EMIFA input clock select
Clock mode select for EMIFA (AECLKIN_SEL[1:0])
00 –
AECLKIN (default mode)
01
CPU/4 Clock Rate
10
CPU/6 Clock Rate
11
Reserved
GP0[3]/
PCIEEAI
L5
PCI EEPROM Auto-Initialization (PCIEEAI)
PCI auto-initialization via external EEPROM
0
PCI auto-initialization through EEPROM is disabled; the PCI peripheral uses the specified
PCI default values (default).
1
PCI auto-initialization through EEPROM is enabled; the PCI peripheral is configured
through EEPROM provided the PCI peripheral pin is enabled (PCI_EN = 1).
Note: If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must
not
be pulled up.
For more information on the PCI EEPROM default values, see the
TMS320C6000 DSP Peripheral
Component Interconnect (PCI) Reference Guide
(literature number SPRU581).
GP0[8]/
PCI66
AD1
PCI frequency selection (PCI66) [PCI peripheral
needs
be enabled (PCI_EN = 1) to use this function]
Selects the PCI operating frequency of 66 MHz or 33 MHz PCI operating frequency is selected at
reset via the pullup/pulldown resistor on the PCI66 pin:
0
PCI operates at 66 MHz (default).
1
PCI operates at 33 MHz.
The -500 speed device supports PCI at 33 MHz only. For proper -500 device operation when the PCI is
enabled (PCI_EN = 1), this pin
must
be pulled up with a 1-k
resistor at device reset.
Note: If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must
not
be pulled up.
HD5
/AD5
Y1
HPI peripheral bus width (HPI_WIDTH)
0
HPI operates as an HPI16.
(HPI bus is 16 bits wide. HD[15:0] pins are used and the remaining HD[31:16] pins are
reserved pins in the Hi-Z state.)
1
HPI operates as an HPI32.
(HPI bus is 32 bits wide. All HD[31:0] pins are used for host-port operations.)
(Also see the PCI_EN; TOUT0/MAC_EN functional description in this table)
PCI_EN
;
TOUT0/
MAC_EN
[E2; C5]
Peripheral Selection
00 –
01
10
11
HPI (default mode) [HPI32, if HD5 = 1; HPI16 if HD5 = 0
EMAC and MDIO; HPI16, if HD5 = 0; HPI disabled, if HD5 = 1
PCI
Reserved
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