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Introduction
What is Covered in This Manual
SYM53C810A Data Manual
1-1
Chapter 1
Introduction
What is Covered in T his
Manual
T his manual provides reference information on the
SYM53C810A PCI- SCSI I/O Processor. It is
intended for system designers and programmers
who are using this device to design a SCSI port for
PCI-based personal computers, workstations, or
embedded applications.
T his chapter includes general information about
the SYM53C810A and other members of the
SYM53C8X X family of PCI-SCSI I/O Processors.
Chapter 2 describes the main functional areas of
the chip in more detail, including the interfaces to
the SCSI bus. Chapter 3 describes the chip’s con-
nection to the PCI bus, including the PCI com-
mands and configuration registers supported.
Chapter 4 contains the pin diagrams and defini-
tions of each signal. Chapter 5 describes each bit
in the operating registers, organized by address.
Chapter 6 defines all of the SCSI SCRIPT S
instructions that are supported by the
SYM53C810A. Chapter 7 contains the electrical
characteristics and AC timings for the chip. T he
appendixes contain a register summary and a
mechanical drawing of the SYM53C810A.
T his data manual assumes the user is familiar with
the current and proposed standards for SCSI and
PCI. For additional background information on
these topics, please refer to the list of reference
materials provided in the Preface of this docu-
ment.
General Description
T he SYM53C810A PCI-SCSI I/O Processor
brings high-performance I/O solutions to host
adapter, workstation, and general computer
designs, making it easy to add SCSI to any PCI
system.
T he SYM53C810A is a pin-for-pin replacement
for the SYM53C810 PCI-SCSI I/O processor. It
performs Fast SCSI transfers in single-ended
mode, and improves performance by optimizing
PCI bus utilization. A system diagram showing the
connections of the SYM53C810A in a PCI system
is pictured in Figure 1-1. A block diagram of the
SYM53C810A is pictured in Figure 1-2.
T he SYM53C810A integrates a high-perfor-
mance SCSI core, a PCI bus master DMA core,
and the Symbios Logic SCSI SCRIPT S proces-
sor to meet the flexibility requirements of SCSI-1,
SCSI-2, and future SCSI standards. It is designed
to implement multi-threaded I/O algorithms with a
minimum of processor intervention, solving the
protocol overhead problems of previous intelligent
and non-intelligent adapter designs.
T he SYM53C810A is fully supported by the
Symbios Logic SCSI Device Management System
(SDMS ), a software package that supports the
Advanced SCSI Protocol Interface (ASPI). SDMS
provides BIOS and driver support for hard disk,
tape, removable media products, and CD-ROM
under the major PC operating systems.
T he SYM53C810A is packaged in a compact rect-
angular 100-pin PQFP package to minimize board
space requirements. It operates the SCSI bus at 5
MB/s asynchronously or 10 MB/s synchronously,
and bursts data to the host at full PCI speeds. T he