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| 型號(hào)： | S1C17705B00E100 |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 8.2 MHz, RISC MICROCONTROLLER, BGA240 |
| 封裝： | 10 X 10 MM, 0.50 MM PITCH, BGA-240 |
| 文件頁(yè)數(shù)： | 89/318頁(yè) |
| 文件大小： | 2516K |
| 代理商： | S1C17705B00E100 |
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17 I2C SLAVE (I2CS)
17-12
Seiko Epson Corporation
S1C17705 TECHNICAL MANUAL
D3
CLKSTR_EN: Clock Stretch On/Off Bit
Turns the clock stretch function on or off.
1 (R/W): On
0 (R/W): Off (default)
After data and ACK are transmitted or received, the slave device may issue a wait request to the master
device until it is ready to transmit/receive by pulling the I2C bus SCL line down to Low. The I2CS mod-
ule supports this clock stretch function. The master device enters a standby state until the wait request is
canceled (the SCL line goes high). When using the clock stretch function, set CLKSTR_EN to 1 before
starting data communication.
D2
NF_EN: Noise Filter On/Off Bit
Turns the noise filter on or off.
1 (R/W): On
0 (R/W): Off (default)
The I2CS module contains a function to remove noise from the SDA1 and SCL1 input signals. This
function is enabled by setting NF_EN to 1.
D1
ASDET_EN: Async. Address Detection On/Off Bit
Turns the asynchronous address detection function on or off.
1 (R/W): On
0 (R/W): Off (default)
The I2CS module operation clock (PCLK) frequency must be set eight-times or higher than the transfer
rate during data transfer. However, the PCLK frequency can be lowered to reduce current consumption
if no other processing is required during standby for data transfer.
The asynchronous address detection function is provided to detect the I2C slave address sent from the
master in this status. This function is enabled by setting ASDET_EN to 1. If the slave address sent from
the master has matched with one that has been set in this I2CS module when the asynchronous address
detection function has been enabled, the I2CS module generates a bus status interrupt and returns NAK
to the I2C master to request for resending the slave address. Set the PCLK frequency to eight-times or
higher than the transfer rate and reset ASDET_EN to 0 in the interrupt handler routine. Data transfer
will be able to resume normally after the master retries transmission. After the master generates a stop
condition to put the I2C bus into free status, the asynchronous address detection function can be enabled
again to lower the operating speed.
Notes: When the asynchronous address detection function is enabled, the I2C bus signals are input
without passing through the noise filter. Therefore, the slave address may not be detected in
a high-noise environment.
When the asynchronous address detection function is enabled, data transfer cannot be per-
formed even if the PCLK frequency is eight-times or higher than the transfer rate. Be sure to
disable the asynchronous address detection function during normal operation.
D0
COM_MODE: I2C Slave Communication Mode Bit
Enables or disables data communication.
1 (R/W): Enabled
0 (R/W): Disabled (default)
Set COM_MODE to 1 to enable data communication after setting I2CSEN to 1 to enable I2CS opera-
tion. When COM_MODE is 0 (default), the I2CS module does not send back a response if the master
has sent the slave address of this module (it is regarded as that the I2CS module has returned a NAK to
the master).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| S1C17705F101100 | 功能描述:16位微控制器 - MCU 16-bit 512KB Flash LCD 128x32 RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| S1C17706 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:Low Power 16-bit Single Chip Microcontroller |
| S1C17711 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:Low Power 16-bit Single Chip Microcontroller |
| S1C17801 | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:CMOS 16-bit Application Specific Controller |
| S1C17801B | 制造商:EPSON 制造商全稱(chēng):EPSON 功能描述:CMOS 16-bit Application Specific Controller |
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