
6 INTERRUPT CONTROLLER (ITC)
6-8
Seiko Epson Corporation
S1C17705 TECHNICAL MANUAL
Interrupt Level Setup Register 3 (ITC_LV3)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Interrupt Level
Setup Register 3
(ITC_LV3)
0x430c
(16 bits)
D15–11 –
reserved
–
0 when being read.
D10–8 ILV7[2:0]
T16A Ch.0 interrupt level
0 to 7
0x0 R/W
D7–3 –
reserved
–
0 when being read.
D2–0 ILV6[2:0]
LCD/SPI Ch.2 interrupt level
0 to 7
0x0 R/W
D[15:11] Reserved
D[10:8]
ILV7[2:0]: T16A Ch.0 Interrupt Level Bits
Set the 16-bit PWM timer Ch.0 interrupt level (0 to 7). (Default: 0x0)
See the description of ILV1[2:0]/ITC_LV0 register.
D[7:3]
Reserved
D[2:0]
ILV6[2:0]: LCD/SPI Ch.2 Interrupt Level Bits
Set the LCD and SPI Ch.2 interrupt levels (0 to 7). (Default: 0x0)
See the description of ILV1[2:0]/ITC_LV0 register.
Interrupt Level Setup Register 4 (ITC_LV4)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Interrupt Level
Setup Register 4
(ITC_LV4)
0x430e
(16 bits)
D15–11 –
reserved
–
0 when being read.
D10–8 ILV9[2:0]
T16 Ch.1 interrupt level
0 to 7
0x0 R/W
D7–3 –
reserved
–
0 when being read.
D2–0 ILV8[2:0]
T16 Ch.0 & Ch.4 interrupt level
0 to 7
0x0 R/W
D[15:11] Reserved
D[10:8]
ILV9[2:0]: T16 Ch.1 Interrupt Level Bits
Set the 16-bit timer Ch.1 interrupt level (0 to 7). (Default: 0x0)
See the description of ILV1[2:0]/ITC_LV0 register.
D[7:3]
Reserved
D[2:0]
ILV8[2:0]: T16 Ch.0 & Ch.4 Interrupt Level Bits
Set the 16-bit timer Ch.0 and Ch.4 interrupt levels (0 to 7). (Default: 0x0)
See the description of ILV1[2:0]/ITC_LV0 register.
Interrupt Level Setup Register 5 (ITC_LV5)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Interrupt Level
Setup Register 5
(ITC_LV5)
0x4310
(16 bits)
D15–11 –
reserved
–
0 when being read.
D10–8 ILV11[2:0]
T16 Ch.3/T16A Ch.3 interrupt
level
0 to 7
0x0 R/W
D7–3 –
reserved
–
0 when being read.
D2–0 ILV10[2:0]
T16 Ch.2 interrupt level
0 to 7
0x0 R/W
D[15:11] Reserved
D[10:8]
ILV11[2:0]: T16 Ch.3/T16A Ch.3 Interrupt Level Bits
Set the 16-bit timer Ch.3 and 16-bit PWM timer Ch.3 interrupt levels (0 to 7). (Default: 0x0)
See the description of ILV1[2:0]/ITC_LV0 register.
D[7:3]
Reserved
D[2:0]
ILV10[2:0]: T16 Ch.2 Interrupt Level Bits
Set the 16-bit timer Ch.2 interrupt level (0 to 7). (Default: 0x0)
See the description of ILV1[2:0]/ITC_LV0 register.
Interrupt Level Setup Register 6 (ITC_LV6)
Register name Address
Bit
Name
Function
Setting
Init. R/W
Remarks
Interrupt Level
Setup Register 6
(ITC_LV6)
0x4312
(16 bits)
D15–11 –
reserved
–
0 when being read.
D10–8 ILV13[2:0]
UART Ch.1 interrupt level
0 to 7
0x0 R/W
D7–3 –
reserved
–
0 when being read.
D2–0 ILV12[2:0]
UART Ch.0 interrupt level
0 to 7
0x0 R/W