
3 MEMORY MAP, BUS CONTROL
S1C17705 TECHNICAL MANUAL
Seiko Epson Corporation
3-3
Protect Bits
3.2.3
In order to protect the memory contents, the Flash memory provides two protection features, write protection and
data read protection, that can be configured for every 32K-byte areas. The write protection disables writing data to
the configured area. The data-read protection disables reading data from the configured area (the read value is al-
ways 0x0000). However, it does not disable the instruction fetch operation by the CPU.
The Flash memory provides the protect bits listed below. Program the protect bit corresponding to the area to be
protected to 0.
Flash Protect Bits
Address
Bit
Function
Setting
Init. R/W
Remarks
0x87ffc
(16 bits)
D15
Flash write-protect bit for 0x80000–0x87fff
1 Writable
0 Protected
1 R/W
D14
Flash write-protect bit for 0x78000–0x7ffff
1 Writable
0 Protected
1 R/W
D13
Flash write-protect bit for 0x70000–0x77fff
1 Writable
0 Protected
1 R/W
D12
Flash write-protect bit for 0x68000–0x6ffff
1 Writable
0 Protected
1 R/W
D11
Flash write-protect bit for 0x60000–0x67fff
1 Writable
0 Protected
1 R/W
D10
Flash write-protect bit for 0x58000–0x5ffff
1 Writable
0 Protected
1 R/W
D9
Flash write-protect bit for 0x50000–0x57fff
1 Writable
0 Protected
1 R/W
D8
Flash write-protect bit for 0x48000–0x4ffff
1 Writable
0 Protected
1 R/W
D7
Flash write-protect bit for 0x40000–0x47fff
1 Writable
0 Protected
1 R/W
D6
Flash write-protect bit for 0x38000–0x3ffff
1 Writable
0 Protected
1 R/W
D5
Flash write-protect bit for 0x30000–0x37fff
1 Writable
0 Protected
1 R/W
D4
Flash write-protect bit for 0x28000–0x2ffff
1 Writable
0 Protected
1 R/W
D3
Flash write-protect bit for 0x20000–0x27fff
1 Writable
0 Protected
1 R/W
D2
Flash write-protect bit for 0x18000–0x1ffff
1 Writable
0 Protected
1 R/W
D1
Flash write-protect bit for 0x10000–0x17fff
1 Writable
0 Protected
1 R/W
D0
Flash write-protect bit for 0x8000–0xffff
1 Writable
0 Protected
1 R/W
Address
Bit
Function
Setting
Init. R/W
Remarks
0x87ffe
(16 bits)
D15
Flash data-read-protect bit for 0x80000–0x87fff 1 Readable
0 Protected
1 R/W
D14
Flash data-read-protect bit for 0x78000–0x7ffff
1 Readable
0 Protected
1 R/W
D13
Flash data-read-protect bit for 0x70000–0x77fff 1 Readable
0 Protected
1 R/W
D12
Flash data-read-protect bit for 0x68000–0x6ffff
1 Readable
0 Protected
1 R/W
D11
Flash data-read-protect bit for 0x60000–0x67fff 1 Readable
0 Protected
1 R/W
D10
Flash data-read-protect bit for 0x58000–0x5ffff
1 Readable
0 Protected
1 R/W
D9
Flash data-read-protect bit for 0x50000–0x57fff 1 Readable
0 Protected
1 R/W
D8
Flash data-read-protect bit for 0x48000–0x4ffff
1 Readable
0 Protected
1 R/W
D7
Flash data-read-protect bit for 0x40000–0x47fff 1 Readable
0 Protected
1 R/W
D6
Flash data-read-protect bit for 0x38000–0x3ffff
1 Readable
0 Protected
1 R/W
D5
Flash data-read-protect bit for 0x30000–0x37fff 1 Readable
0 Protected
1 R/W
D4
Flash data-read-protect bit for 0x28000–0x2ffff
1 Readable
0 Protected
1 R/W
D3
Flash data-read-protect bit for 0x20000–0x27fff 1 Readable
0 Protected
1 R/W
D2
Flash data-read-protect bit for 0x18000–0x1ffff
1 Readable
0 Protected
1 R/W
D1
Flash data-read-protect bit for 0x10000–0x17fff 1 Readable
0 Protected
1 R/W
D0
reserved
1
1 R/W Always set to 1.
Notes: Be sure not to locate the area with data-read protection into the .data and .rodata sections.
Be sure to set D0 of address 0x87ffe to 1. If it is set to 0, the program cannot be booted.
Access Control for the Flash Controller
3.2.4
The S1C17705 on-chip Flash memory is accessed via the exclusive Flash controller. A MISC register is used to set
the access condition for the Flash controller.
Setting number of read access cycles for the Flash controller
In order to read data from the Flash memory properly, set the appropriate number of read access cycles accord-
ing to the CCLK frequency using the FLCYC[2:0]/MISC_FL register.