
8 I/O PORTS (P)
8-2
Seiko Epson Corporation
S1C17705 TECHNICAL MANUAL
Input/Output Pin Function Selection (Port MUX)
8.2
The I/O port pins share peripheral module input/output pins. Each pin can be configured for use as an I/O port or
for a peripheral module function via the corresponding port function-select bits. Pins not used for peripheral mod-
ules can be used as general-purpose I/O ports.
2.1 Input/Output Pin Function Selection
Table 8.
Pin function 1
PxyMUX[1:0] = 0x0
Pin function 2
PxyMUX[1:0] = 0x1
Pin function 3
PxyMUX[1:0] = 0x2
Pin function 4
PxyMUX[1:0] = 0x3
Port function select bits
P00/EXCL1 (T16A)
REMO (REMC)
SCLK0 (UART)
–
P00MUX[1:0]/P00_03PMUX register
P01/EXCL2 (T16A)
REMI (REMC)
SCLK1 (UART)
–
P01MUX[1:0]/P00_03PMUX register
P02
TOUT6/CAP6 (T16A)
–
P02MUX[1:0]/P00_03PMUX register
P03/EXCL0 (T16A)
#ADTRG (ADC10)
–
P03MUX[1:0]/P00_03PMUX register
P04
SPICLK0 (SPI)
–
P04MUX[1:0]/P04_07PMUX register
P05
SDO0 (SPI)
–
P05MUX[1:0]/P04_07PMUX register
P06
SDI0 (SPI)
–
P06MUX[1:0]/P04_07PMUX register
P07
#SPISS0 (SPI)
–
P07MUX[1:0]/P04_07PMUX register
P10
SPICLK1 (SPI)
–
P10MUX[1:0]/P10_13PMUX register
P11
SOUT0 (UART)
SDO1 (SPI)
–
P11MUX[1:0]/P10_13PMUX register
P12
SIN0 (UART)
SDI1 (SPI)
–
P12MUX[1:0]/P10_13PMUX register
P13
TOUT3/CAP3 (T16A) AIN7 (ADC10)
SDO2 (SPI)
P13MUX[1:0]/P10_13PMUX register
P14
TOUT4/CAP4 (T16A) AIN6 (ADC10)
SDI2 (SPI)
P14MUX[1:0]/P14_17PMUX register
P15
TOUT5/CAP5 (T16A) AIN5 (ADC10)
FOUTA (CLG)
P15MUX[1:0]/P14_17PMUX register
P16
TOUT2/CAP2 (T16A) AIN4 (ADC10)
–
P16MUX[1:0]/P14_17PMUX register
P17
TOUT1/CAP1 (T16A) AIN3 (ADC10)
–
P17MUX[1:0]/P14_17PMUX register
P20
AIN2 (ADC10)
SPICLK2 (SPI)
–
P20MUX[1:0]/P20_23PMUX register
P21
AIN1 (ADC10)
#SPISS1 (SPI)
–
P21MUX[1:0]/P20_23PMUX register
P22
AIN0 (ADC10)
#SPISS2 (SPI)
–
P22MUX[1:0]/P20_23PMUX register
P23/EXCL3 (T16A)
SENB1 (RFC)
–
P23MUX[1:0]/P20_23PMUX register
P24
SENA1 (RFC)
–
P24MUX[1:0]/P24_27PMUX register
P25
REF1 (RFC)
–
P25MUX[1:0]/P24_27PMUX register
P26
RFIN1 (RFC)
–
P26MUX[1:0]/P24_27PMUX register
P27
RFIN0 (RFC)
SOUT1 (UART)
–
P27MUX[1:0]/P24_27PMUX register
P30
REF0 (RFC)
SIN1 (UART)
–
P30MUX[1:0]/P30_33PMUX register
P31
SENA0 (RFC)
SCL0 (I2CM)
–
P31MUX[1:0]/P30_33PMUX register
P32
SENB0 (RFC)
SDA0 (I2CM)
–
P32MUX[1:0]/P30_33PMUX register
P33
SCL1 (I2CS)
SCL0 (I2CM)
–
P33MUX[1:0]/P30_33PMUX register
P34
SDA1 (I2CS)
SDA0 (I2CM)
–
P34MUX[1:0]/P34_37PMUX register
P35
FOUTB (CLG)
#BFR (I2CS)
–
P35MUX[1:0]/P34_37PMUX register
P36
TOUT7/CAP7 (T16A) EXOSC3 (CLG)
–
P36MUX[1:0]/P34_37PMUX register
P37
TOUT0/CAP0 (T16A) LFRO (LCD)
RFCLKO (RFC)
P37MUX[1:0]/P34_37PMUX register
DSIO (DBG)
P40
–
P40MUX[1:0]/P40_42PMUX register
DST2 (DBG)
P41
–
P41MUX[1:0]/P40_42PMUX register
DCLK (DBG)
P42
–
P42MUX[1:0]/P40_42PMUX register
At initial reset, each I/O port pin (Pxy) is initialized for the default function (“Pin function 1” in Table 8.2.1).
Pins P00, P01, P03, and P23 can also be used as 16-bit PWM timer external clock input pins by setting them to in-
put mode. However, general-purpose input port function is also effective in this case.
For information on functions other than the I/O ports, see the descriptions of the peripheral modules indicated in
parentheses. The sections below describe port functions with the pins set as general-purpose I/O ports.
Data Input/Output
8.3
Data input/output control
The I/O ports allow selection of the data input/output direction for each bit using PxOENy/Px_OEN register and
PxIENy/Px_IEN register. PxOENy enables and disables data output, while PxIENy enables and disables data
input.