
21 R/F CONVERTER (RFC)
21-2
Seiko Epson Corporation
S1C17705 TECHNICAL MANUAL
The R/F converter converts the resistance or capacitance of the sensor connected into frequency (RFCLK) using the
embedded CR oscillator circuit, and counts this frequency using the measurement counter for a set period of time
to provide the digital value equivalent to the sensor value. The time base counter is also included for generating
the measurement time by counting an internal clock (TCCLK). In addition to CR oscillation using a sensor (sensor
oscillation), the R/F converter performs CR oscillation using a reference element with less variation in the charac-
teristics due to external factors (reference oscillation). This removes error factors such as voltage fluctuations and
unevenness in quality to realize precise measurements. The CR oscillator circuit supports AC driving and external
clock input as well as general DC driving, allowing use of various sensors.
RFC Input/Output Pins
21.2
Table 21.2.1 lists the RFC input/output pins.
2.1 List of R/F Converter Input/Output Pins
Table 21.
Pin name
I/O
Qty
Function
SENB0/SENB1
I/O
2
Sensor B oscillation control pin (see Note 1 below)
SENA0/SENA1
I/O
2
Sensor A oscillation control pin (see Note 1 below)
REF0/REF1
I/O
2
Reference oscillation control pin (see Note 1 below)
RFIN0/RFIN1
I/O
2
RFCLK input and oscillation control pin (see Note 2 below)
RFCLKO
O
1
RFCLK monitoring output pin
Outputs RFCLK to monitor the oscillation frequency.
Notes: 1.The pins go to high impedance status when the port function is switched for the R/F converter.
2.The RFINx pin goes to VSS level when the port function is switched for the R/F converter. A
large current may flow through the RFINx pin if the pin is externally biased.
The R/F converter input/output pins are shared with I/O ports and are initially set as general-purpose I/O port pins.
The pin functions must be switched using the port function select bits to use the general-purpose I/O port pins as R/
F converter input/output pins.
For detailed information on pin function switching, see the “I/O Ports (P)” chapter.
Operation Clock
21.3
The RFC module includes a clock source selector, dividers, and a gate circuit for controlling the operation clock.
Note: The operation clock (TCCLK) must be enabled before setting the R/F converter. Otherwise, the R/
F converter cannot operate normally.
Clock source selection
Use CLKSRC[1:0]/RFC_CLK register to select the clock source from IOSC, OSC3, and OSC1.
3.1 Clock Source Selection
Table 21.
CLKSRC[1:0]
Clock source
0x3
Reserved
0x2
OSC3
0x1
OSC1
0x0
IOSC
(Default: 0x1)
Clock division ratio selection
When the clock source is OSC1
No division ratio needs to be selected when OSC1 is selected for the clock source. The OSC1 clock (typ.
32.768 kHz) is directly used as TCCLK.
When the clock source is IOSC or OSC3
When IOSC or OSC3 is selected for the clock source, use CLKDIV[1:0]/RFC_CLK register to select the
division ratio.