Advance Information Page 23 of 112 JUNE 2008 REVISION 1.1 BALL LOCATION PIN NAME TYPE BALL LOCA" />
參數(shù)資料
型號： PI7C8154BNAIE
廠商： Pericom
文件頁數(shù)： 31/114頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE ASYNC 304-PBGA
產(chǎn)品變化通告： Product Discontinuation Notice 22/Jan/2010
標(biāo)準(zhǔn)包裝： 27
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 304-BBGA
供應(yīng)商設(shè)備封裝： 304-PBGA（31x31）
包裝： 管件
安裝類型： 表面貼裝
PI7C8154B
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 23 of 112
JUNE 2008 REVISION 1.1
BALL
LOCATION
PIN NAME
TYPE
BALL
LOCATION
PIN NAME
TYPE
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2
SIGNAL DEFINITIONS
This Chapter offers information about PCI transactions, transaction forwarding across PI7C8154B,
and transaction termination. The PI7C8154B has two 128-byte buffers for read data buffering of
upstream and downstream transactions. Also, PI7C8154B has two 128-byte buffers for write data
buffering of upstream and downstream transactions.
2.1
TYPES OF TRANSACTIONS
This section provides a summary of PCI transactions performed by PI7C8154B. Table 2-1 lists the
command code and name of each PCI transaction. The Master and Target columns indicate support
for each transaction when PI7C8154B initiates transactions as a master, on the primary and
secondary buses, and when PI7C8154B responds to transactions as a target, on the primary and
secondary buses.
Table 2-1 PCI TRANSACTIONS
Types of Transactions
Initiates as Master
Responds as Target
Primary
Secondary
Primary
Secondary
0000
Interrupt Acknowledge
N
0001
Special Cycle
Y
N
0010
I/O Read
Y
0011
I/O Write
Y
0100
Reserved
N
0101
Reserved
N
0110
Memory Read
Y
0111
Memory Write
Y
1000
Reserved
N
1001
Reserved
N
1010
Configuration Read
N
Y
N
1011
Configuration Write
Y (Type 1 only)
Y
Y (Type 1 only)
1100
Memory Read Multiple
Y
1101
Dual Address Cycle
Y
1110
Memory Read Line
Y
1111
Memory Write and Invalidate
Y
As indicated in Table 2-1, the following PCI commands are not supported by PI7C8154B:
PI7C8154B never initiates a PCI transaction with a reserved command code and, as a target,
PI7C8154B ignores reserved command codes.
PI7C8154B does not generate interrupt acknowledge transactions. PI7C8154B ignores
interrupt acknowledge transactions as a target.
PI7C8154B does not respond to special cycle transactions. PI7C8154B cannot guarantee
delivery of a special cycle transaction to downstream buses because of the broadcast nature of
the special cycle command and the inability to control the transaction as a target. To generate
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