Advance Information Page 72 of 114 DEC 2009 REVISION 1.02 EEPROM BYTE ADDRESS CONFIGURATION OFF" />
參數(shù)資料
型號: PI7C8154ANAE
廠商: Pericom
文件頁數(shù): 85/114頁
文件大小: 0K
描述: IC PCI-PCI BRIDGE ASYNC 304-PBGA
標準包裝: 27
系列: *
應用: *
接口: *
電源電壓: *
封裝/外殼: 304-BBGA
供應商設備封裝: 304-PBGA(31x31)
包裝: 管件
安裝類型: 表面貼裝
PI7C8154A
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 72 of 114
DEC 2009 REVISION 1.02
EEPROM BYTE
ADDRESS
CONFIGURATION
OFFSET
DESCRIPTION
21 – 22h
74 – 75h
Port Option Register
23 – 24h
80 – 81h
Secondary Master Timeout Counter
25 – 26h
82 – 83h
Primary Master Timeout Counter
27 – 28h
DE – DFh
Power Management Capabilities
29 – 2Ah
E0 – E1h
Power Management Control Status Register
2Bh
E3h
Power Management Data
2C – 3Fh
Reserved – MUST BE SET TO 0
10
VITAL PRODUCT DATA (VPD)
The bridge contains the Vital Product Data registers as specified in the PCI Local Bus
Specification, Revision 2.2. The bridge provides 192 bytes of storage in the EEPROM for the VPD
data starting at offset ECh of the configuration space.
11
CLOCKS
This chapter provides information about the clocks.
11.1
PRIMARY AND SECONDARY CLOCK INPUTS
PI7C8154A implements a primary clock input for the PCI interface. The primary interface is
synchronized to the primary clock input, P_CLK, and the secondary interface is synchronized to
the secondary clock input. The secondary clock operates at either the same frequency as the
primary clock or at half of the frequency of the primary clock. PI7C8154A operates at a maximum
frequency of 66 MHz.
11.2
SECONDARY CLOCK OUTPUTS
The bridge has 10 secondary clock outputs, S_CLKOUT[9:0], that can be used as clock inputs for
up to nine external secondary bus devices. The S_CLKOUT[9:0] outputs are derived from P_CLK.
These are the rules for using secondary clocks:
Each secondary clock output is limited to no more than one load
One of the secondary clock outputs must be used to feedback to S_CLKIN
12
PCI POWER MANAGEMENT
PI7C8154A incorporates functionality that meets the requirements of the PCI Power Management
Specification, Revision 1.0. These features include:
PCI Power Management registers using the Enhanced Capabilities Port (ECP) address
mechanism
Support for D0, D3HOT and D3COLD power management states
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相關代理商/技術參數(shù)
參數(shù)描述
PI7C8154ANAE-33 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154B 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE
PI7C8154BNA 制造商:Pericom Semiconductor Corporation 功能描述:
PI7C8154BNAE 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154BNAE-80 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray