Advance Information Page 103 of 114 DEC 2009 REVISION 1.02 Upon activation of the TRST# reset p" />
參數資料
型號: PI7C8154ANAE
廠商: Pericom
文件頁數: 6/114頁
文件大?。?/td> 0K
描述: IC PCI-PCI BRIDGE ASYNC 304-PBGA
標準包裝: 27
系列: *
應用: *
接口: *
電源電壓: *
封裝/外殼: 304-BBGA
供應商設備封裝: 304-PBGA(31x31)
包裝: 管件
安裝類型: 表面貼裝
PI7C8154A
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 103 of 114
DEC 2009 REVISION 1.02
Upon activation of the TRST# reset pin, the latched instruction asynchronously changes to the id
code instruction. When the TAP controller moves into the test state other than by reset activation,
the opcode changes as TDI shifts, and becomes active on the falling edge of TCK.
16.2
BOUNDARY SCAN INSTRUCTION SET
The PI7C8154A supports three mandatory boundary-scan instructions (BYPASS, SAMPLE and
EXTEST). Table 16-1 shown below lists the PI7C8154A’s boundary-scan instruction codes.
Table 16-1 TAP PINS
Instruction
/
Requisite
Opcode (binary)
Description
EXTEST
IEEE 1149.1
Required
00000
EXTEST initiates testing of external circuitry, typically board-level
interconnects and off chip circuitry. EXTEST connects the boundary-
scan register between TDI and TDO. When EXTEST is selected, all
output signal pin values are driven by values shifted into the boundary-
scan register and may change only of the falling edge of TCK. Also,
when EXTEST is selected, all system input pin states must be loaded
into the boundary-scan register on the rising-edge of TCK.
SAMPLE
IEEE 1149.1
Required
0001
SAMPLE performs two functions:
A snapshot of the sample instruction is captured on the rising
edge of TCK without interfering with normal operation. The
instruction causes boundary-scan register cells associated with
outputs to sample the value being driven.
On the falling edge of TCK, the data held in the boundary-scan
cells is transferred to the slave register cells. Typically, the slave
latched data is applied to the system outputs via the EXTEST
instruction.
INTSCAN
00010
Enable internal SCAN test
CLAMP
00100
CLAMP instruction allows the state of the signals driven from
component pins to be determined from the boundary-scan register
while the bypass register is selected as the serial path between TDI and
TDO. The signal driven from the component pins will not change
while the CLAMP instruction is selected.
BYPASS
11111
BYPASS instruction selects the one-bit bypass register between TDI
and TDO pins. 0 (binary) is the only instruction that accesses the
bypass register. While this instruction is in effect, all other test data
registers have no effect on system operation. Test data registers with
both test and system functionality performs their system functions
when this instruction is selected.
16.3
TAP TEST DATA REGISTERS
The PI7C8154A contains two test data registers (bypass and boundary-scan). Each test data
register selected by the TAP controller is connected serially between TDI and TDO. TDI is
connected to the test data register’s most significant bit. TDO is connected to the least significant
bit. Data is shifted one bit position within the register towards TDO on each rising edge of TCK.
While any register is selected, data is transferred from TDI to TDO without inversion. The
following sections describe each of the test data registers.
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