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參數(shù)資料
| 型號(hào)： | PI7C8154ANAE |
| 廠商： | Pericom |
| 文件頁數(shù)： | 67/114頁 |
| 文件大小： | 0K |
| 描述： | IC PCI-PCI BRIDGE ASYNC 304-PBGA |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 304-BBGA |
| 供應(yīng)商設(shè)備封裝： | 304-PBGA（31x31） |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
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PI7C8154A
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 56 of 114
DEC 2009 REVISION 1.02
For downstream transactions, when PI7C8154A is delivering data to the target on the secondary
bus and S_PERR# is asserted by the target, the following events occur:
PI7C8154A sets the secondary interface data parity detected bit in the secondary status
register, if the secondary parity error response bit is set in the bridge control register.
PI7C8154A captures the parity error condition to forward it back to the initiator on the primary
bus.
Similarly, for upstream transactions, when PI7C8154A is delivering data to the target on the
primary bus and P_PERR# is asserted by the target, the following events occur:
PI7C8154A sets the primary interface data-parity-detected bit in the status register, if the
primary parity-error-response bit is set in the command register.
PI7C8154A captures the parity error condition to forward it back to the initiator on the
secondary bus.
A delayed write transaction is completed on the initiator bus when the initiator repeats the write
transaction with the same address, command, data, and byte enable bits as the delayed write
command that is at the head of the posted data queue. Note that the parity bit is not compared when
determining whether the transaction matches those in the delayed transaction queues.
Two cases must be considered:
When parity error is detected on the initiator bus on a subsequent re-attempt of the transaction
and was not detected on the target bus.
When parity error is forwarded back from the target bus
For downstream delayed write transactions, when the parity error is detected on the initiator bus
and PI7C8154A has write status to return, the following events occur:
PI7C8154A first asserts P_TRDY# and then asserts P_PERR# two cycles later, if the primary
interface parity-error-response bit is set in the command register.
PI7C8154A sets the primary interface parity-error-detected bit in the status register.
Because there was not an exact data and parity match, the write status is not returned and the
transaction remains in the queue.
Similarly, for upstream delayed write transactions, when the parity error is detected on the initiator
bus and PI7C8154A has write status to return, the following events occur:
PI7C8154A first asserts S_TRDY# and then asserts S_PERR# two cycles later; if the
secondary interface parity-error-response bit is set in the bridge control register (offset 3Ch).
PI7C8154A sets the secondary interface parity-error-detected bit in the secondary status
register.
Because there was not an exact data and parity match, the write status is not returned and the
transaction remains in the queue.
For downstream transactions, where the parity error is being passed back from the target bus and
the parity error condition was not originally detected on the initiator bus, the following events
occur:
Bridge asserts P_PERR# two cycles after the data transfer, if the following are both true:
The parity-error-response bit is set in the command register of the primary interface
The parity-error-response bit is set in the bridge control register of the secondary interface
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8154ANAE-33 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154B | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE |
| PI7C8154BNA | 制造商:Pericom Semiconductor Corporation 功能描述: |
| PI7C8154BNAE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154BNAE-80 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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