Advance Information Page 33 of 112 DEC 2009 REVISION 1.02 Decodes the device number and drives " />
參數(shù)資料
型號： PI7C8154ANAE
廠商： Pericom
文件頁數(shù)： 42/114頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE ASYNC 304-PBGA
標準包裝： 27
系列： *
應用： *
接口： *
電源電壓： *
封裝/外殼： 304-BBGA
供應商設備封裝： 304-PBGA（31x31）
包裝： 管件
安裝類型： 表面貼裝
PI7C8154A
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 33 of 112
DEC 2009 REVISION 1.02
Decodes the device number and drives the bit pattern specified in Table 2-6 on S_AD[31:16]
for the purpose of asserting the device’s IDSEL signal.
Sets S_AD[15:11] to 0.
Leaves unchanged the function number and register number fields.
PI7C8154A asserts a unique address line based on the device number. These address lines may be
used as secondary bus IDSEL signals. The mapping of the address lines depends on the device
number in the Type 1 address bits P_AD[15:11]. Table 2-6 presents the mapping that PI7C8154A
uses.
Table 2-6 DEVICE NUMBER TO IDSEL S_AD PIN MAPPING
Device Number
P_AD[15:11]
Secondary IDSEL S_AD[31:16]
S_AD
0h
00000
0000 0000 0000 0001
16
1h
00001
0000 0000 0000 0010
17
2h
00010
0000 0000 0000 0100
18
3h
00011
0000 0000 0000 1000
19
4h
00100
0000 0000 0001 0000
20
5h
00101
0000 0000 0010 0000
21
6h
00110
0000 0000 0100 0000
22
7h
00111
0000 0000 1000 0000
23
8h
01000
0000 0001 0000 0000
24
9h
01001
0000 0010 0000 0000
25
Ah
01010
0000 0100 0000 0000
26
Bh
01011
0000 1000 0000 0000
27
Ch
01100
0001 0000 0000 0000
28
Dh
01101
0010 0000 0000 0000
29
Eh
01110
0100 0000 0000 0000
30
Fh
01111
1000 0000 0000 0000
31
10h – 1Eh
10000 – 11110
0000 0000 0000 0000
-
1Fh
11111
Generate special cycle (P_AD[7:2] = 00h)
0000 0000 0000 0000 (P_AD[7:2] = 00h)
-
PI7C8154A can assert up to 16 unique address lines to be used as IDSEL signals for up to 16
devices on the secondary bus, for device numbers ranging from 0 through 8. Because of electrical
loading constraints of the PCI bus, more than 16 IDSEL signals should not be necessary. However,
if device numbers greater than 16 are desired, some external method of generating IDSEL lines
must be used, and no upper address bits are then asserted. The configuration transaction is still
translated and passed from the primary bus to the secondary bus. If no IDSEL pin is asserted to a
secondary device, the transaction ends in a master abort.
PI7C8154A forwards Type 1 to Type 0 configuration read or write transactions as delayed
transactions. Type 1 to Type 0 configuration read or write transactions are limited to a single 32-bit
data transfer.
2.8.3
TYPE 1 TO TYPE 1 FORWARDING
Type 1 to Type 1 transaction forwarding provides a hierarchical configuration mechanism when
two or more levels of PCI-to-PCI bridges are used.
When PI7C8154A detects a Type 1 configuration transaction intended for a PCI bus downstream
from the secondary bus, PI7C8154A forwards the transaction unchanged to the secondary bus.
Ultimately, this transaction is translated to a Type 0 configuration command or to a special cycle
transaction by a downstream PCI-to-PCI bridge. Downstream Type 1 to Type 1 forwarding occurs
when the following conditions are met during the address phase:
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相關代理商/技術參數(shù)
參數(shù)描述
PI7C8154ANAE-33 功能描述:外圍驅動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154B 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE
PI7C8154BNA 制造商:Pericom Semiconductor Corporation 功能描述:
PI7C8154BNAE 功能描述:外圍驅動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154BNAE-80 功能描述:外圍驅動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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