Advance Information Page 113 of 114 DEC 2009 REVISION 1.02 19 APPENDIX 19.1 PI7C8154/A/B vs. In" />
參數(shù)資料
型號： PI7C8154ANAE
廠商： Pericom
文件頁數(shù)： 17/114頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE ASYNC 304-PBGA
標(biāo)準(zhǔn)包裝： 27
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 304-BBGA
供應(yīng)商設(shè)備封裝： 304-PBGA（31x31）
包裝： 管件
安裝類型： 表面貼裝
PI7C8154A
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 113 of 114
DEC 2009 REVISION 1.02
19
APPENDIX
19.1
PI7C8154/A/B vs. Intel 21154, PBGA-304
Pericom PI7C8154/A/B provides direct replacement to Intel 21154.
Following table is PI7C8154/A/B pin comparison to Intel 21154
Pin Number
PI7C8154/A/B
Intel 21154
A22
VDD / * EEDATA
VDD
A23
VSS / * EECLK
VSS
B6
VDD / *NC
VDD
D11
PMEENA_L
VDD
V20
Reserved
VSS
Y18
Reserved
VDD
AA22
VSS / * NC
VSS
AB1
VDD / *ASYNC_SEL#
VDD
AB2
VSS / * ASYNC_CLKIN
VSS
AC22
VDD / * EE_EN#
VDD
λ
Pin A22: VDD / *EEDATA – For 8154A/B, this pin is used as VDD and serial data interface for
EEPROM. For Intel 21154, this pin is defined as VDD.
λ
Pin A23: VSS / *EECLK – For 8154A/B, this pin is used as VSS and serial clock interface for EEPROM.
For Intel 21154, this pin is defined as VSS.
λ
Pin B6: VDD / *NC – For 8154/A, this pin is defined as power pin. For 8154B, this pin can be no
connected. For Intel 21154 is defined as VDD
λ
Pin D11: PMEENA_L is used to indicate the secondary devices are capable of asserting PME_L or not. For
Intel 21154, this pin is defined as VDD.
λ
Pin V20: For pin V20, it must be tied to ground. For Intel 21154, this pin is defined as VSS.
λ
Pin Y18: For pin Y18, it must be tied to VDD. For Intel 21154, this pin is defined as VDD.
λ
Pin AA22: VSS / *NC – For 8154/A, this pin is defined as ground pin. For 8154B, this pin can be no
connected. For Intel 21154, this pin is defined as VSS.
λ
Pin AB1: VDD / *ASYNC_SEL# - For 8154/A, this pin is defined as power pin. For 8154B, this pin is
used as enables asynchronous mode for the bridge. For Intel 21154, this pin is defined as VDD.
0: Secondary bus clock outputs (S_CLKOUT [9:0]) will use the clock signal from ASYNC_CLKIN input instead of
the P_CLK.
1: Secondary bus clock outputs (S_CLKOUT [9:0]) will use the P_CLK input for synchronous operation.
λ
Pin AB2: VSS / * ASYNC_CLKIN – For 8154/A, this pin is defined as ground pin. For 8154B, this pin is
used as an external clock input in order to generate the secondary clock outputs (S_CLKOUT [9:0]) when
enabled by ASYNC_SEL#. For Intel 21154, this pin is defined as VSS.
λ
Pin AC22: VDD / * EE_EN# – For 8154, this pin is defined as power pin. For 8154A/B, this pin is used as
enable EEPROM interface when it is tied low. For Intel 21154, this pin is defined as VDD.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C8154ANAE-33 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154B 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE
PI7C8154BNA 制造商:Pericom Semiconductor Corporation 功能描述:
PI7C8154BNAE 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C8154BNAE-80 功能描述:外圍驅(qū)動器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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