參數(shù)資料
型號: CD1283
廠商: Intel Corp.
英文描述: IEEE 1284-Compatible Parallel Interface
中文描述: 符合IEEE 1284兼容并行接口
文件頁數(shù): 45/94頁
文件大小: 1237K
代理商: CD1283
IEEE 1284-Compatible Parallel Interface
CD1283
Datasheet
45
5.10.1
Interfacing to an Intel
Microprocessor-Based System
With very little additional logic, the CD1283 can interface to any system based on a processor in
the Intel 80x86 family.
Figure 13
shows a generalized view of an I/O-mapped interface with an
80286-based system. To provide the proper strobes and controls, the IOR* and IOW* control
strobes synthesize the DS* and R/W* signals. DTACK* is an input to wait-state-generation logic
that holds the processor (if necessary) until the CD1283 completes the I/O request.
Figure 13. Intel
80x86 Family Interface
80x86
SYSTEM
CD1283
CS*
A[6:0]
DB[15:0]
ADDRESS
DATA
IOR*
IOW*
DS*
R/W*
A[23:7]
A[6:0]
READY
DTACK*
SVCREQP*
SVCACKP*
ADDRESS
DECODE
LOGIC
WAIT-STATE
GENERATION
LOGIC
IRQ
INPUTS
DMAREQ*
DMAACK*
DMA
CONTROL
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