
MOTOROLA
3-18
OPERAND CONVENTIONS
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RCPU
REFERENCE MANUAL
gle-precision data is converted to double-precision format when loaded from mem-
ory into an FPR. A format conversion from double- to single-precision is performed
when data from an FPR is stored. Floating-point exceptions cannot occur during
these operations.
All arithmetic operations use floating-point double-precision format.
Floating-point single-precision formats are used by the following four types of in-
structions:
Load Floating-Point Single-Precision (
lfs
) — This instruction accesses a sin-
gle-precision operand in single-precision format in memory, converts it to dou-
ble-precision, and loads it into an FPR. Exceptions are not detected during the
load operation.
Round to floating-point single-precision — If the operand is not already in sin-
gle-precision range, the floating round to single-precision instruction rounds a
double-precision operand to single-precision, checking the exponent for sin-
gle-precision range and handling any exceptions according to respective en-
able bits in the FPSCR. The instruction places that operand into an FPR as a
double-precision operand. For results produced by single-precision arithmetic
instructions and by single-precision loads, this operation does not alter the
value.
Single-precision arithmetic instructions — These instructions take operands
from the FPRs in double-precision format, perform the operation as if it pro-
duced an intermediate result correct to infinite precision and with unbounded
range, and then force this intermediate result to fit in single-precision format.
Status bits in the FPSCR and in the condition register are set to reflect the sin-
gle-precision result. The result is then converted to double-precision format
and placed into an FPR. The result falls within the range supported by the sin-
gle format.
For single-precision operations, source operands must be representable in
single-precision format. If they are not, the result placed into the target FPR,
and the setting of status bits in the FPSCR and in the condition register, are
undefined.
Store Floating-Point Single-Precision (
stfs
) — This form of instruction con-
verts a double-precision operand to single-precision format and stores that
operand into memory. If the operand requires denormalization in order to fit in
single-precision format, it is automatically denormalized prior to being stored.
No exceptions are detected on the store operation (the value being stored is
effectively assumed to be the result of an instruction of one of the preceding
three types).
When the result of a load floating-point single-precision (
lfs
), floating-point round
to single-precision (
frsp
x
), or single-precision arithmetic instruction is stored in an
FPR, the low-order 29 fraction bits are zero. This is shown in
Figure 3-20
.
F
Freescale Semiconductor, Inc.
n
.