
MOTOROLA
4-22
ADDRESSING MODES AND INSTRUCTION SET SUMMARY
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RCPU
REFERENCE MANUAL
4.4.2 Floating-Point Multiply-Add Instructions
These instructions combine multiply and add operations without an intermediate
rounding operation. The fractional part of the intermediate product is 106 bits wide,
and all 106 bits take part in the add/subtract portion of the instruction.
The floating-point multiply-add instructions are summarized in
Table 4-8
.
Floating-
Point Divide
Single-
Precision
fdivs
fdivs.
fr
D
,fr
A
,fr
B
The floating-point operand in register
fr
A is divided by the floating-
point operand in register
fr
B. No remainder is preserved.
If the most significant bit of the resultant significand is not a one, the
result is normalized. The result is rounded to the target precision under
control of the floating-point rounding control field RN of the FPSCR
and placed into register
fr
D.
Floating-point division is based on exponent subtraction and division
of the significands.
FPSCR[FPRF] is set to the class and sign of the result, except for
invalid operation exceptions when FPSCR[VE] = 1 and zero divide
exceptions when FPSCR[ZE] = 1.
fdivs
fdivs.
Floating-Point Divide Single-Precision
Floating-Point Divide Single-Precision with CR Update.
The dot suffix enables the update of the condition
register.
Table 4-8 Floating-Point Multiply-Add Instructions
Name
Mnemonic
Operand
Syntax
Operation
Floating-
Point
Multiply-
Add
fmadd
fmadd.
fr
D
,fr
A
,fr
C
,fr
B
The floating-point operand in register
fr
A is multiplied by the floating-
point operand in register
fr
C. The floating-point operand in register
fr
B
is added to this intermediate result.
If the most significant bit of the resultant significand is not a one the
result is normalized. The result is rounded to the target precision
under control of the floating-point rounding control field RN of the
FPSCR and placed into register
fr
D.
FPSCR[FPRF] is set to the class and sign of the result, except for
invalid operation exceptions when FPSCR[VE] = 1.
fmadd
fmadd.
Floating-Point Multiply-Add
Floating-Point Multiply-Add with CR Update. The dot
suffix enables the update of the condition register.
Table 4-7 Floating-Point Arithmetic Instructions (Continued)
Name
Mnemonic
Operand
Syntax
Operation
F
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n
.