
MOTOROLA
6-12
EXCEPTIONS
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RCPU
REFERENCE MANUAL
6.7 Ordering of Synchronous, Precise Exceptions
Synchronous exceptions are handled in strict program order, even though instruc-
tions can execute and exceptions can be detected out of order. Therefore, before
the RCPU processes an instruction-caused exception, it executes all instructions
and handles any resulting exceptions that appear earlier in the instruction stream.
Only one synchronous, precise exception can be reported at a time. If single in-
structions generate multiple exception conditions, the processor handles the ex-
ception it encounters first; then the execution of the excepting instruction continues
until the next excepting condition is encountered.
Table 6-6
lists the order in which
synchronous exceptions are detected.
Asynchronous,
maskable
4
Peripheral or external maskable breakpoint request — When this exception type
occurs, the processor retires as many instructions as possible (i.e., all instructions
that have completed the writeback stage without generating an instruction, provided
all instructions ahead of it in the history buffer have also completed the writeback
stage without generating an exception). Then, depending on the instruction
currently at the head of the history buffer, the processor either flushes the history
buffer or allows the instruction at the head of the buffer to retire before generating
an exception. Refer to
6.4 Implementation of Asynchronous Exceptions
.
5
External interrupt — When this exception type occurs, the processor retires as
many instructions as possible (i.e., all instructions that have completed the
writeback stage without generating an instruction, provided all instructions ahead of
it in the history buffer have also completed the writeback stage without generating
an exception). Then, depending on the instruction currently at the head of the
history buffer, the processor either flushes the history buffer or allows the instruction
at the head of the buffer to retire before generating an exception (provided a higher
priority exception does not exist). Refer to
6.4 Implementation of Asynchronous
Exceptions
. This exception is delayed if MSR[EE] is cleared.
6
Decrementer — This exception is the lowest priority exception. When this exception
type occurs, the processor retires as many instructions as possible (i.e., all
instructions that have completed the writeback stage without generating an
instruction, provided all instructions ahead of it in the history buffer have also
completed the writeback stage without generating an exception). Then, depending
on the instruction currently at the head of the history buffer, the processor either
flushes the history buffer or allows the instruction at the head of the buffer to retire
before generating an exception (provided a higher priority exception does not exist).
Refer to
6.4 Implementation of Asynchronous Exceptions
. This exception is
delayed if MSR[EE] is cleared.
Table 6-5 Exception Priorities (Continued)
Class
Priority
Exception
F
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.