
MOTOROLA
6-36
EXCEPTIONS
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RCPU
REFERENCE MANUAL
6.11.10.5 Floating-Point Enabled Exceptions
Floating-point exceptions are signaled by condition bits set in the floating-point sta-
tus and control register (FPSCR). They can cause the system floating-point en-
abled exception error handler to be invoked. All floating-point exceptions are
handled precisely. The FPSCR is shown below.
A listing of FPSCR bit settings is shown in
Table 6-26
.
FPSCR —
Floating-Point Status and Control Register
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FX
FEX
VX
OX
UX
ZX
XX
VXS-
NAN
VXISI
VXIDI
VXZD
Z
VXIMZ VXVC
FR
FI
FPRF
0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
FPRF[16:19]
0
VX-
SOFT
VX-
SQRT
VXCVI
VE
OE
UE
ZE
XE
NI
RN
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 6-26 FPSCR Bit Settings
Bit(s)
Name
Description
0
FX
Floating-point exception summary (FX). Every floating-point instruction implicitly sets FP-
SCR[FX] if that instruction causes any of the floating-point exception bits in the FPSCR to
change from zero to one. The
mcrfs
instruction implicitly clears FPSCR[FX] if the FPSCR field
containing FPSCR[FX] is copied. The
mtfsf
,
mtfsfi
,
mtfsb0
, and
mtfsb1
instructions can set
or clear FPSCR[FX] explicitly. This is a sticky bit.
1
FEX
Floating-point enabled exception summary (FEX). This bit signals the occurrence of any of the
enabled exception conditions. It is the logical OR of all the floating-point exception bits masked
with their respective enable bits. The
mcrfs
instruction implicitly clears FPSCR[FEX] if the re-
sult of the logical OR described above becomes zero. The
mtfsf
,
mtfsfi
,
mtfsb0
, and
mtfsb1
instructions cannot set or clear FPSCR[FEX] explicitly. This is not a sticky bit.
2
VX
Floating-point invalid operation exception summary (VX). This bit signals the occurrence of any
invalid operation exception. It is the logical OR of all of the invalid operation exceptions. The
mcrfs
instruction implicitly clears FPSCR[VX] if the result of the logical OR described above
becomes zero. The
mtfsf
,
mtfsfi
,
mtfsb0
, and
mtfsb1
instructions cannot set or clear FP-
SCR[VX] explicitly. This is not a sticky bit.
3
OX
Floating-point overflow exception (OX). This is a sticky bit. See
6.11.10.8 Overflow Exception
Condition
.
4
UX
Floating-point underflow exception (UX). This is a sticky bit. See
6.11.10.9 Underflow Excep-
tion Condition
.
F
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