
Functional Overview
73
November 2002 Revised January 2005
SPRS205D
3.11 Interrupts
Vector-relative locations and priorities for all internal and external interrupts are shown in Table 340.
Table 340. Interrupt Table
NAME
SOFTWARE
(TRAP)
EQUIVALENT
RELATIVE
LOCATION
(HEX BYTES)
PRIORITY
FUNCTION
RESET
NMI
SINT0
0
0
Reset (hardware and software)
SINT1
8
1
Nonmaskable interrupt
BERR
SINT24
C0
2
Bus Error interrupt
INT0
SINT2
10
3
External interrupt #0
INT1
SINT16
80
4
External interrupt #1
INT2
SINT3
18
5
External interrupt #2
TINT0
SINT4
20
6
Timer #0 interrupt
RINT0
SINT5
28
7
McBSP #0 receive interrupt
XINT0
SINT17
88
8
McBSP #0 transmit interrupt
RINT1
SINT6
30
9
McBSP #1 receive interrupt
XINT1/MMCSD1
SINT7
38
10
McBSP #1 transmit interrupt, MMC/SD #1 interrupt
USB
SINT8
40
11
USB interrupt
DMAC0
SINT18
90
12
DMA Channel #0 interrupt
DMAC1
SINT9
48
13
DMA Channel #1 interrupt
DSPINT
SINT10
50
14
Interrupt from host
INT3/WDTINT
INT4/RTC
§
SINT11
58
15
External interrupt #3 or Watchdog timer interrupt
SINT19
98
16
External interrupt #4 or RTC interrupt
RINT2
SINT12
60
17
McBSP #2 receive interrupt
XINT2/MMCSD2
SINT13
68
18
McBSP #2 transmit interrupt , MMC/SD #2 interrupt
DMAC2
SINT20
A0
19
DMA Channel #2 interrupt
DMAC3
SINT21
A8
20
DMA Channel #3 interrupt
DMAC4
SINT14
70
21
DMA Channel #4 interrupt
DMAC5
SINT15
78
22
DMA Channel #5 interrupt
TINT1
SINT22
B0
23
Timer #1 interrupt
I
2
C interrupt
IIC
SINT23
B8
24
DLOG
SINT25
C8
25
Data Log interrupt
RTOS
SINT26
D0
26
Real-time Operating System interrupt
SINT27
D8
27
Software interrupt #27
SINT28
E0
28
Software interrupt #28
SINT29
E8
29
Software interrupt #29
SINT30
F0
30
Software interrupt #30
SINT31
F8
31
Software interrupt #31
Absolute addresses of the interrupt vector locations are determined by the contents of the IVPD and IVPH registers. Interrupt vectors for
interrupts 015 and 2431 are relative to IVPD. Interrupt vectors for interrupts 1623 are relative to IVPH.
The NMI pin is internally tied high. However, NMI interrupt vector can be used for SINT1 and Watchdog Timer Interrupt.
§
It is recommended that either the INT4 or RTC interrupt be used. If both INT4 and RTC interrupts are used, one interrupt event can potentially
hold off the other interrupt. For example, if INT4 is asserted first and held low, the RTC interrupt will not be recognized until the INT4 pin is back
to high-logic state again. The INT4 pin must be pulled high if only the RTC interrupt is used.