參數(shù)資料
型號(hào): TMX320VC5509AGHH
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: TMS320VC5509A Fixed-Point Digital Signal Processor
中文描述: TMS320VC5509A定點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù): 126/144頁
文件大?。?/td> 1603K
代理商: TMX320VC5509AGHH
Electrical Specifications
126
November 2002 Revised January 2005
SPRS205D
E21
CLKOUT
HINT
CLKOUT reflects the CPU clock.
Figure 531. HINT Timings
HCNTL0
HR/W
Read Data
Valid
HRDY
HA[13:0]
HDS
HCS
HD[15:0]
(read)
Valid
E16
E14
E13
E1
E10
E2
Valid
Valid
Write Data
HD[15:0]
(write)
E15
E17
E18
Read
Write
E6
E8
E7
E9
E13
E14
E15
HBE[1:0]
Valid
Valid
NOTES: A. Any non-multiplexed access with HCNTL0 low will result in HPIC register access. For data read or write, HCNTL0 must stay high
during the EHPI access.
B. The falling edge of HCS must occur concurrent with or before the falling edge of HDS. The rising edge of HCS must occur
concurrent with or after the rising edge of HDS. If HDS1 and/or HDS2 are tied permanently active and HCS is used as a strobe,
the timing requirements shown for HDS apply to HCS. HRDY is always driven to the same value as its internal state.
Figure 532. EHPI Nonmultiplexed Read/Write Timings
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