參數(shù)資料
型號： TMX320VC5509AGHH
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： TMS320VC5509A Fixed-Point Digital Signal Processor
中文描述： TMS320VC5509A定點數(shù)字信號處理器
文件頁數(shù)： 21/144頁
文件大?。?/td> 1603K
代理商： TMX320VC5509AGHH
Introduction
21
November 2002 Revised January 2005
SPRS205D
Table 23. Signal Descriptions (Continued)
TERMINAL
NAME
RESET
CONDITION
BK
FUNCTION
I/O/Z
MULTIPLEXED
SIGNAL NAME
PARALLEL BUS (CONTINUED)
EMIF asynchronous memory read enable or general-purpose IO8. This
pin serves in one of two functions: EMIF asynchronous memory read
enable (EMIF.ARE) or general-purpose IO8 (GPIO8). The initial state of
this pin depends on the GPIO0 pin. See Section 3.5.1 for more information.
C0
I/O/Z
GPIO0 = 1:
Output,
EMIF.ARE
EMIF.ARE
O/Z
Active-low EMIF asynchronous memory read enable. EMIF.ARE is
selected when the Parallel Port Mode bit field of the External Bus Selection
Register is 00 or 01.
BK
GPIO0 = 0:
Input,
GPIO8
GPIO8
I/O/Z
General-purpose IO8. GPIO8 is selected when the Parallel Port Mode bit
field of the External Bus Selection Register is set to 10 or 11.
C1
O/Z
EMIF asynchronous memory output enable or HPI interrupt output. This
pin serves in one of two functions: EMIF asynchronous memory output
enable (EMIF.AOE) or HPI interrupt output (HPI.HINT). The initial state of
this pin depends on the GPIO0 pin. See Section 3.5.1 for more information.
GPIO0 = 1:
Output,
EMIF.AOE
EMIF.AOE
O/Z
Active-low asynchronous memory output enable. EMIF.AOE is selected
when the Parallel Port Mode bit field of the External Bus Selection Register
is 00 or 01.
GPIO0 = 0:
Output,
HPI.HINT
HPI.HINT
O/Z
Active-low HPI interrupt output. HPI.HINT is selected when the Parallel
Port Mode bit field of the External Bus Selection Register is 10 or 11.
C2
I/O/Z
EMIF asynchronous memory write enable or HPI read/write. This pin
serves in one of two functions: EMIF asynchronous memory write enable
(EMIF.AWE) or HPI read/write (HPI.HR/W). The initial state of this pin
depends on the GPIO0 pin. See Section 3.5.1 for more information.
GPIO0 = 1:
Output,
EMIF.AWE
EMIF.AWE
O/Z
Active-low EMIF asynchronous memory write enable. EMIF.AWE is
selected when the Parallel Port Mode bit field of the External Bus Selection
Register is 00 or 01.
BK
GPIO0 = 0:
Input,
HPI.HR/W
HPI.HR/W
I
HPI read/write. HPI.HR/W is selected when the Parallel Port Mode bit field
of the External Bus Selection Register is 10 or 11. HPI.HR/W controls the
direction of the HPI transfer.
C3
I/O/Z
EMIF data ready input or HPI ready output. This pin serves in one of two
functions: EMIF data ready input (EMIF.ARDY) or HPI ready output
(HPI.HRDY). The initial state of this pin depends on the GPIO0 pin. See
Section 3.5.1 for more information.
GPIO0 = 1:
Input,
EMIF.ARDY
EMIF.ARDY
I
EMIF data ready input. Used to insert wait states for slow memories.
EMIF.ARDY is selected when the Parallel Port Mode bit field of the
External Bus Selection Register is 00 or 01.
H
GPIO0 = 0:
Output,
HPI.HRDY
HPI.HRDY
O
HPI ready output. HPI.HRDY is selected when the Parallel Port Mode bit
field of the External Bus Selection Register is 10 or 11.
I = Input, O = Output, S = Supply, Hi-Z = High-impedance
BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,
PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer
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