參數(shù)資料
型號: TMX320VC5509AGHH
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: TMS320VC5509A Fixed-Point Digital Signal Processor
中文描述: TMS320VC5509A定點數(shù)字信號處理器
文件頁數(shù): 128/144頁
文件大?。?/td> 1603K
代理商: TMX320VC5509AGHH
Electrical Specifications
128
November 2002 Revised January 2005
SPRS205D
HR/W
Read Data
n
HRDY
HDS
HAS
HCS
HD[15:0]
(read)
HPIA contents
n + 1
n + 2
E11
E12
E15
E16
E20
E13
E1
E2
E19
E14
E6
E8
E7
Read Data
E1
E2
E6
E8
E7
HCNTL[1:0]
Valid (01)
Valid (01)
HBE[1:0]
Valid
Valid
NOTES: A. During autoincrement mode, although the EHPI internally increments the memory address, reads of the HPIA register by the host
will always indicate the base address.
B. In autoincrement mode, if HBE[1:0] are used to access the data as 8-bit-wide units, the HPIA increments only following each high
byte (HBE1 low) access.
C. The falling edge of HCS must occur concurrent with or before the falling edge of HDS. The rising edge of HCS must occur
concurrent with or after the rising edge of HDS. If HDS1 and/or HDS2 are tied permanently active and HCS is used as a strobe,
the timing requirements shown for HDS apply to HCS. HRDY is always driven to the same value as its internal state.
Figure 534. EHPI Multiplexed Memory (HPID) Read Timings With Autoincrement
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