- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385002 > TMX320VC5509AGHH (Texas Instruments, Inc.) TMS320VC5509A Fixed-Point Digital Signal Processor PDF資料下載
參數(shù)資料
| 型號： | TMX320VC5509AGHH |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | TMS320VC5509A Fixed-Point Digital Signal Processor |
| 中文描述： | TMS320VC5509A定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 27/144頁 |
| 文件大?。?/td> | 1603K |
| 代理商： | TMX320VC5509AGHH |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當(dāng)前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁
Introduction
27
November 2002 Revised January 2005
SPRS205D
Table 23. Signal Descriptions (Continued)
TERMINAL
NAME
RESET
CONDITION
BK
FUNCTION
I/O/Z
MULTIPLEXED
SIGNAL NAME
MULTICHANNEL BUFFERED SERIAL PORTS SIGNALS (CONTINUED)
McBSP1 receive frame synchronization or Secure Digital1 data2. At reset,
this pin is configured as McBSP1.FSR.
S12
I/O/Z
McBSP1.FSR
I/Z
McBSP1 receive frame synchronization. The McBSP1.FSR pulse initiates
the data receive process over McBSP1.DR.
Input
SD1.DAT2
I/O/Z
SD1 data2 is selected when the External Bus Selection Register has 10 in
the Serial Port1 Mode bit field.
S13
O/Z
McBSP1 serial data transmit or MultiMedia Card/Secure Digital1 serial
clock. At reset, this pin is configured as McBSP1.DX.
McBSP1.DX
O/Z
McBSP1 serial data transmit. McBSP1.DX is placed in the
high-impedance state when not transmitting, when RESET is asserted, or
when OFF is low. McBSP1.DX is selected when the External Bus
Selection Register has 00 in the Serial Port1 Mode bit field or following
reset.
BK
Hi-Z
MMC1.CLK
SD1.CLK
O
MMC1 or SD1 serial clock is selected when the External Bus Selection
Register has 10 in the Serial Port1 Mode bit field.
S14
I/O/Z
McBSP1 transmit clock or MultiMedia Card/Secure Digital1 data0. At
reset, this pin is configured as McBSP1.CLKX.
McBSP1.CLKX
I/O/Z
McBSP1 transmit clock. McBSP1.CLKX serves as the serial shift clock for
the serial port transmitter. The McBSP1.CLKX pin is configured as input
after reset. McBSP1.CLKX is selected when the External Bus Selection
Register has 00 in the Serial Port1 Mode bit field or following reset.
H
Input
MMC1.DAT
SD1.DAT0
I/O/Z
MMC1 or SD1 data0 is selected when the External Bus Selection Register
has 10 in the Serial Port1 Mode Bit field.
S15
I/O/Z
McBSP1 transmit frame synchronization or Secure Digital1 data3. At
reset, this pin is configured as McBSP1.FSX.
McBSP1.FSX
I/O/Z
McBSP1 transmit frame synchronization. The McBSP1.FSX pulse
initiates the data transmit process over McBSP1.DX. Configured as an
input following reset. McBSP1.FSX is selected when the External Bus
Selection Register has 00 in the Serial Port1 Mode bit field or following
reset.
Input
SD1.DAT3
I/O/Z
SD1 data3 is selected when the External Bus Selection Register has 10 in
the Serial Port1 Mode bit field.
S20
I/O/Z
McBSP2
command/response. At reset, this pin is configured as McBSP2.CLKR.
receive
clock
or
MultiMedia
Card/Secure
Digital2
McBSP2.CLKR
I
McBSP2 receive clock. McBSP2.CLKR serves as the serial shift clock for
the serial port receiver. McBSP2.CLKR is selected when the External Bus
Selection Register has 00 in the Serial Port2 Mode bit field or following
reset.
H
Input
MMC2.CMD
SD2.CMD
I/O/Z
MMC2 or SD2 command/response is selected when the External Bus
Selection Register has 10 in the Serial Port2 Mode bit field.
I = Input, O = Output, S = Supply, Hi-Z = High-impedance
BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,
PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMX470R1A64PN | 16/32-Bit RISC Flash Microcontroller |
| TMXT504 | SAW BANDPASS FILTER |
| TN0104 | N-Channel Enhancement-Mode Vertical DMOS FET(擊穿電壓40V，低門限1.6V，N溝道增強型垂直DMOS結(jié)構(gòu)場效應(yīng)管) |
| TN0104 | N-Channel Enhancement-Mode Vertical DMOS FETs |
| TN0104N3 | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMX320VC5509APGE | 制造商:Texas Instruments 功能描述: |
| TMX320VC5509GHH | 制造商:Rochester Electronics LLC 功能描述:AMADEUS CATALOG DEVICE - Bulk 制造商:Texas Instruments 功能描述: |
| TMX320VC5509GHH31 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TMX320VC5509PGE | 制造商:Rochester Electronics LLC 功能描述:AMADEUS - Bulk 制造商:Texas Instruments 功能描述: |
| TMX320VC5509PGE31 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。