參數(shù)資料
型號： TMX320VC5509AGHH
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： TMS320VC5509A Fixed-Point Digital Signal Processor
中文描述： TMS320VC5509A定點數(shù)字信號處理器
文件頁數(shù)： 57/144頁
文件大?。?/td> 1603K
代理商： TMX320VC5509AGHH
Functional Overview
57
November 2002 Revised January 2005
SPRS205D
Table 324. DMA Configuration Registers
PORT ADDRESS
(WORD)
REGISTER NAME
DESCRIPTION
RESET VALUE
GLOBAL REGISTER
0x0E00
DMA_GCR[2:0]
DMA Global Control Register
xxxx xxxx xxxx x000
0x0E02
DMA_GSCR
DMA Software Compatibility Register
0x0E03
DMA_GTCR
DMA Timeout Control Register
CHANNEL #0 REGISTERS
0x0C00
DMA_CSDP0
DMA Channel 0 Source Destination
Parameters Register
0000 0000 0000 0000
0x0C01
DMA_CCR0[15:0]
DMA Channel 0 Control Register
0000 0000 0000 0000
0x0C02
DMA_CICR0[5:0]
DMA Channel 0 Interrupt Control Register
xxxx xxxx xx00 0011
0x0C03
DMA_CSR0[6:0]
DMA Channel 0 Status Register
xxxx xxxx xx00 0000
0x0C04
DMA_CSSA_L0
DMA Channel 0 Source Start Address Register
(lower bits)
Undefined
0x0C05
DMA_CSSA_U0
DMA Channel 0 Source Start Address Register
(upper bits)
Undefined
0x0C06
DMA_CDSA_L0
DMA Channel 0 Source Destination Address Register
(lower bits)
Undefined
0x0C07
DMA_CDSA_U0
DMA Channel 0 Source Destination Address Register
(upper bits)
Undefined
0x0C08
DMA_CEN0
DMA Channel 0 Element Number Register
Undefined
0x0C09
DMA_CFN0
DMA Channel 0 Frame Number Register
Undefined
0x0C0A
DMA_CFI0/
DMA_CSFI0
DMA Channel 0 Frame Index Register/
DMA Channel 0 Source Frame Index Register
Undefined
0x0C0B
DMA_CEI0/
DMA_CSEI0
§
DMA Channel 0 Element Index Register/
DMA Channel 0 Source Element Index Register
§
Undefined
0x0C0C
DMA_CSAC0
DMA Channel 0 Source Address Counter
Undefined
0x0C0D
DMA_CDAC0
DMA Channel 0 Destination Address Counter
Undefined
0x0C0E
DMA_CDEI0
DMA Channel 0 Destination Element Index Register
Undefined
0x0C0F
Hardware reset: x denotes a “don’t care.”
On the TMS320VC5509, the channel frame index applies to both source and destination and this register behaves as DMA_CFIn. On the
TMS320VC5509A, DMA_CSFIn and DMA_CDFIn provide separate source and destination frame indexing. The 5509A can be programmed
for software compatibility with the 5509 through the Software Compatibility Register (DMA_GSCR).
§
On the TMS320VC5509, the channel element index applies to both source and destination and this register behaves as DMA_CEIn. On the
TMS320VC5509A, DMA_CSEIn and DMA_CDEIn provide separate source and destination frame indexing. The 5509A can be programmed
for software compatibility with the 5509 through the Software Compatibility Register (DMA_GSCR).
DMA_CDFI0
DMA Channel 0 Destination Frame Index Register
Undefined
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