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參數(shù)資料
| 型號(hào)： | TMX320VC5509AGHH |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | TMS320VC5509A Fixed-Point Digital Signal Processor |
| 中文描述： | TMS320VC5509A定點(diǎn)數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 39/144頁(yè) |
| 文件大?。?/td> | 1603K |
| 代理商： | TMX320VC5509AGHH |
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Functional Overview
39
November 2002 Revised January 2005
SPRS205D
Table 34. Synchronization Control Function (Continued)
SYNC FIELD IN
DMA_CCR
SYNCHRONIZATION MODE
01010b
McBSP2/MMCSD2 Transmit Event
Serial Port 2 Mode:
00 = McBSP2 Transmit Event (XEVT2)
01 = MMC/SD2 Transmit Event (XMMCEVT2)
10 = Reserved
11 = Reserved
Reserved. These bits should always be written with 0.
Reserved. These bits should always be written with 0.
Timer 0 Interrupt Event
Timer 1 Interrupt Event
External Interrupt 0
External Interrupt 1
External Interrupt 2
External Interrupt 3
External Interrupt 4 / I
2
C Receive Event (REVTI2C)
I
2
C Transmit Event (XEVTI2C)
Reserved (Do not use these values)
The I
2
C receive event (REVTI2C) and external interrupt 4 (INT4) share a synchronization input to the DMA. When the SYNC field of the
DMA_CCR is set to 10011b, the logical OR of these two sources is used for DMA synchronization.
01011b
01100b
01101b
01110b
01111b
10000b
10001b
10010b
10011b
10100b
Other values
3.4
I
2
C Interface
The TMS320VC5509A includes an I
2
C serial port. The I
2
C port supports:
Compatible with Philips I
2
C Specification Revision 2.1 (January 2000)
Operates at 100 Kbps or 400 Kbps
7-bit addressing mode
Master (transmit/receive) and slave (transmit/receive) modes of operation
Events: DMA, interrupt, or polling
The I
2
C module clock
must
be in the range from 7 MHz to 12 MHz. This is necessary for proper operation of
the I
2
C module. With the I
2
C module clock in this range, the noise filters on the SDA and SCL pins suppress
noise that has a duration of 50 ns or shorter. The I
2
C module clock is derived from the DSP clock divided by
a programmable prescaler.
NOTE:
device is powered down and SDA and SCL are driven by other devices connected to the I
2
C bus.
I/O buffers are
not
fail-safe. The SDA and SCL pins could potentially draw current if the
3.5
Configurable External Buses
The 5509A offers several combinations of configurations for its external parallel port and two serial ports. This
allows the system designer to choose the appropriate media interface for its application without the need of
a large-pin-count package. The External Bus Selection Register controls the routing of the parallel and serial
port signals.
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| TMX320VC5509APGE | 制造商:Texas Instruments 功能描述: |
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| TMX320VC5509GHH31 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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