參數(shù)資料
型號： TMX320VC5509AGHH
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： TMS320VC5509A Fixed-Point Digital Signal Processor
中文描述： TMS320VC5509A定點(diǎn)數(shù)字信號處理器
文件頁數(shù)： 24/144頁
文件大?。?/td> 1603K
代理商： TMX320VC5509AGHH
Introduction
24
November 2002 Revised January 2005
SPRS205D
Table 23. Signal Descriptions (Continued)
TERMINAL
NAME
RESET
CONDITION
BK
FUNCTION
I/O/Z
MULTIPLEXED
SIGNAL NAME
PARALLEL BUS (CONTINUED)
C11
I/O/Z
EMIF SDRAM column strobe or HPI chip select input. This pin serves in
one of two functions: EMIF SDRAM column strobe (EMIF.SDCAS) or HPI
chip select input (HPI.HCS). The initial state of this pin depends on the
GPIO0 pin. See Section 3.5.1 for more information.
GPIO0 = 1:
Output,
EMIF.SDCAS
EMIF.SDCAS
O/Z
Active-low EMIF SDRAM column strobe. EMIF.SDCAS is selected when
the Parallel Port Mode bit field of the External Bus Selection Register is set
to 00 or 01.
BK
GPIO0 = 0:
Input,
HPI.HCS
HPI.HCS
I
HPI Chip Select Input. HPI.HCS is the select input for the HPI and must be
driven low during accesses. HPI.HCS is selected when the Parallel Port
Mode bit field is set to 10 or 11.
C12
I/O/Z
EMIF SDRAM write enable or HPI Data Strobe 1 input. This pin serves in
one of two functions: EMIF SDRAM write enable (EMIF.SDWE) or HPI
data strobe 1 (HPI.HDS1). The initial state of this pin depends on the
GPIO0 pin. See Section 3.5.1 for more information.
GPIO0 = 1:
Output,
EMIF.SDWE
EMIF.SDWE
O/Z
EMIF SDRAM write enable. EMIF. SDWE is selected when the Parallel
Port Mode bit field of the External Bus Selection Register is set to 00 or 01.
BK
GPIO0 = 0:
Input,
HPI.HDS1
HPI.HDS1
I
HPI Data Strobe 1 Input. HPI.HDS1 is driven by the host read or write
strobes to control the transfer. HPI.HDS1 is selected when the Parallel
Port Mode bit field is set to 10 or 11.
C13
I/O/Z
SDRAM A10 address line or general-purpose IO13. This pin serves in one
of two functions: SDRAM A10 address line (EMIF.SDA10) or
general-purpose IO13 (GPIO13). The initial state of this pin depends on
the GPIO0 pin. See Section 3.5.1 for more information.
GPIO0 = 1:
Output,
EMIF.SDA10
EMIF.SDA10
O/Z
SDRAM A10 address line. Address line/autoprecharge disable for
SDRAM memory. Serves as a row address bit (logically equivalent to A12)
during ACTV commands and also disables the autoprecharging function
of SDRAM during read or write operations. EMIF.SDA10 is selected when
the Parallel Port Mode bit field of the External Bus Selection Register is set
to 00 or 01.
BK
GPIO0 = 0:
Input,
GPIO13
GPIO13
I/O/Z
General-purpose IO13. GPIO13 is selected when the Parallel Port Mode
bit field is set to 10 or 11.
C14
I/O/Z
Memory interface clock for SDRAM, HPI Data Strobe 2 input, or
general-purpose IO14. This pin serves in one of two functions: memory
interface clock for SDRAM (EMIF.CLKMEM) or HPI data strobe 2
(HPI.HDS2). The initial state of this pin depends on the GPIO0 pin. See
Section 3.5.1 for more information.
GPIO0 = 1:
Output,
EMIF.CLKMEM
EMIF.CLKMEM
O/Z
Memory interface clock for SDRAM. EMIF.CLKMEM is selected when the
Parallel Port Mode bit field of the External Bus Selection Register is set to
00 or 01.
BK
GPIO0 = 0:
Input,
HPI.HDS2
HPI.HDS2
I
HPI Data Strobe 2 Input. HPI.HDS2 is driven by the host read or write
strobes to control the transfer. HPI.HDS2 is selected when the Parallel
Port Mode bit field is set to 10 or 11.
I = Input, O = Output, S = Supply, Hi-Z = High-impedance
BK = bus keeper (the bus keeper maintains the previous voltage level during reset or while the output pin is not driven), PU = pullup,
PD = pulldown, H = hysteresis input buffer, FS = fail-safe buffer
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