參數(shù)資料
型號： PCL6045B
廠商： Electronic Theatre Controls, Inc.
英文描述： User Manual For PCL6045B Pulse Control LSI
中文描述： 用戶手冊PCL6045B脈沖控制大規(guī)模集成電路
文件頁數(shù)： 39/176頁
文件大?。?/td> 7952K
代理商： PCL6045B
- 32 -
8-3-5. PRDR (RDR) registers
These pre-registers are used to specify the deceleration rate.
RDR is the register for PRDR.
The normal setting range is 1 to 65,535.
When RDR = 0, the deceleration rate will be the value set by PRUR.
8-3-6. PRMG (RMG) registers
These pre-registers are used to set the speed magnification rate.
RMG is the register for PRMG.
The setting range is 2 to 4,095.
Sets the relationship between the speed register PRFL (RFL), PRFH (RFH), RFA values and the
operation speeds.
The actual operation speed [pps] is a product of the speed magnification rate and the speed register
setting.
[Setting example when the reference clock is 19.6608 MHz]
Speed
magnification rate
2999
0.1x
1499
0.2x
599
0.5x
299
1x
149
2x
Setting
Operation speed
setting range [pps]
0.1 to 6,553.5
0.2 to 13,107.0
0.5 to 32,767.5
1 to 65,535
2 to 131,070
Setting
Speed
magnification rate
5x
10x
20x
50x
100x
Operation speed setting
range [pps]
5 to 327,675
10 to 655,350
20 to 1,310,700
50 to 3,276,750
100 to 6,553,500
59
29
14
5
2
8-3-7. PRDP (RDP) registers
These pre-registers are used to set a ramping-down point (deceleration start point) for positioning
operations.
RDP is the 2nd register for PRDP.
Bits marked with a "#" symbol are ignored when written and change their setting when read according to
the setting of MSDP (bit 13) in the PRMD register.
MSDP
Setting details
Offset for automatically set values.
When a positive value is entered, the PCL will start deceleration earlier and the
FL speed range will be used longer.
When a negative value is entered, the PCL will start deceleration later and will
not reach the FL speed.
When number of pulses left drops to less than a set value, the motor on that axis
starts to decelerate.
bit #
0
Same as bit
23.
1
0
Note 1: Bits marked with an "*" (asterisk) will be ignored when written and are 0 when read.
Note 2: Bits marked with an "&" symbol will be ignored when written and will be the same value as the
upper most bit among the non-marked bits. (Sign extension.)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
#
#
#
#
#
#
#
#
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
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