參數(shù)資料
型號： PCL6045B
廠商： Electronic Theatre Controls, Inc.
英文描述： User Manual For PCL6045B Pulse Control LSI
中文描述： 用戶手冊PCL6045B脈沖控制大規(guī)模集成電路
文件頁數(shù)： 123/176頁
文件大小： 7952K
代理商： PCL6045B
- 116 -
Note: In order to prevent incorrect counts, when the count timing and reset timing match, the counter
will be +1 or -1, never 0. Please note this operation detail when detecting 0 with the comparator
function.
11-10-3. Latch the counter and count condition
All the counters can latch their counts using any of the following methods. The setting is made in RENV5
(environment setting 5) register. The latched values can be output from the RLTC1 to 4 registers.
1) Turn ON the LTC signal.
2) Turn ON the ORG signal.
3) When the conditions for Comparator 4 are satisfied.
4) When the conditions for Comparator 5 are satisfied.
5) When a command is written.
The current speed can also be latched instead of COUNTER3 (deflection). Items 1) to 4) above can also
be latched by hardware timing.
The LTC input timing can be set by in RENV1 (environment setting 1). An
a counter value is latched by turning ON the LTC signal or the ORG signal. This allows you to identify
the cause of an event interrupt.
signal can be output when
Specify the latch method for a counter (1 to 4) <Set LTM0 to 1 (bit 12 to 13) in
RENV5>
00: Turn ON the LTC signal.
01: Turn ON the ORG signal.
10: When the conditions for Comparator 4 are satisfied.
11: When the conditions for Comparator 5 are satisfied
Specify the latch method for the current speed <Set LTFD (bit 14) in RENV5>
1: Latch the current speed instead of COUNTER 3 (deflection).
[RENV5] (WRITE)
15
-
-
n
n
-
-
-
-
8
[RENV5] (WRITE)
15
-
n
-
-
-
-
-
-
8
Specify latching using hardware <Set LTOF (bit 15) in RENV5>
1: Do not latch 1) to 4) above with hardware timing.
[RENV5] (WRITE)
15
n
-
-
-
-
-
-
-
[RENV1] (WRITE)
23
n
-
-
-
-
-
-
-
8
Specify the LTC signal mode <Set LTCL (bit 23) in RENV1>
0: Latch on the falling edge.
1: Latch on the rising edge.
[RIRQ] (WRITE)
15
n
n
-
-
-
-
-
-
16
Set an event interrupt cause <Set IRLT (bit 14) and IROT (bit 15) in RIRQ>
IRLT = 1: Output an
signal when the counter value is latched by the LTC
signal being turned ON.
IROT = 1: Output an
signal when the counter value is latched by the ORG
signal being turned ON.
Read the event interrupt cause <ISLT (bit 14), ISOL (bit 15) in RIST>
ISLT = 1: Latch the counter value when the LTC signal turns ON.
ISOL = 1: Latch the counter value when the ORG signal turns ON.
Read the LTC signal <SLTC (bit 14) in RSTS>
0: The LTC signal is OFF
1: The LTC signal is ON
Counter latch command <LTCH: Control command>
Latch the contents of the counters (COUNTER1 to 4).
8
[RIST] (READ)
15
n
n
-
-
-
-
-
-
[RSTS] (READ)
15
-
n
-
-
-
-
-
-
[Control command]
29h
8
8
相關(guān)PDF資料
PDF描述
PCLR20014-SERIES Optoelectronic
PCA200A2 Optoelectronic
PCA200G2 Optoelectronic
PCA200O2 Optoelectronic
PCA200R2 Optoelectronic
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCL6605 制造商:Tamura Corporation of America 功能描述:
PCL6610 制造商:Tamura Corporation of America 功能描述:
PCL6611 制造商:Tamura Corporation of America 功能描述:
PCL6630 制造商:Tamura Corporation of America 功能描述:
PCL-711B 制造商:ADVANTECH 制造商全稱:Advantech Co., Ltd. 功能描述:40 kS/s, 12-bit, 8-ch SE Input ISA Multifunction Card
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*