參數(shù)資料
型號： PCL6045B
廠商： Electronic Theatre Controls, Inc.
英文描述： User Manual For PCL6045B Pulse Control LSI
中文描述： 用戶手冊PCL6045B脈沖控制大規(guī)模集成電路
文件頁數(shù)： 122/176頁
文件大?。?/td> 7952K
代理商： PCL6045B
- 115 -
3) When using 90
4) When two pulses are input (counted on the rising edge)
11-10-2. Counter reset
All the counters can be reset using any of the following three methods.
1) When the CLR input signal turns ON (set in RENV3).
2) When a zero return is executed (set in RENV3).
3) When a command is written.
The PCL can also be specified to reset automatically, soon after latching the counter value.
The CLR input timing can be set in RENV1 (environment setting 1). An
CLR input is the cause of an event interrupt.
Action when the CLR signal turns ON <Set CU1C to 4C (bit 16 to 19) in the
RENV3>
CU1C (bit 16) =1: Reset COUNTER1 (command position).
CU2C (bit 17) =1: Reset COUNTER2 (mechanical position).
CU3C (bit 18) =1: Reset COUNTER3 (deflection).
CU4C (bit 19) =1: Reset COUNTER4 (general-purpose).
Action when a zero return is complete <Set CU1R to 4R (bit 20 to 23) in
RENV3>
CU1R (bit 20) =1: Reset COUNTER1 (command position).
CU2R (bit 21) =1: Reset COUNTER2 (mechanical position)
CU3R (bit 22) =1: Reset COUNTER3 (deflection)
CU4R (bit 23) =1: Reset COUNTER4 (general-purpose)
Setting when latched <Set CU1L to 4L (bits 24 to 27) in RENV5>
CU1L (bit 24) = 1: Reset COUNTER1 (instructed position).
CU2L (bit 25) = 1: Reset COUNTER2 (machine position).
CU3L (bit 26) = 1: Reset COUNTER3 (deviation).
CU4L (bit 27) = 1: Reset COUNTER4 (general-purpose).
Action for the CLR signal <Set CLR0 and 1 (bit 20 & 21) in RENV1>
00: Clear on the falling edge 10: Clear on a LOW level
01: Clear on the rising edge 11: Clears on a HIGH level
Reading the CLR signal <SCLR (bit 13) in RSTS>
0: The CLR signal is OFF
1: The CLR signal is ON
Set event interrupt cause <Set IRCL (bit 13) in RIRQ>
1: Output an
signal when resetting the counter value by turning the CLR
signal ON.
signal can be output when a
[RENV3] (WRITE)
23
-
-
-
-
n
n
n
n
16
[RENV3] (WRITE)
23
n
n
n
n
-
-
-
-
16
[RENV5] (WRITE)
31
0
0
0
0
n
n
n
n
24
[RENV1] (WRITE)
23
-
-
n
n
-
-
-
-
[RSTS] (READ)
15
-
-
n
-
-
-
-
-
[RIRQ] (WRITE)
15
-
-
n
-
-
-
-
-
16
8
[RIST] (READ)
15
-
-
n
-
-
-
-
-
8
Read the event interrupt cause <ISCL (bit 13) in RIST>
1: When you want to reset the counter value by turning ON the CLR signal.
8
Counter reset command <CUN1R to CUN4R: Control command>
20h: Set COUNTER1 (command position) to zero
21h: Set COUNTER2 (mechanical position) to zero.
22h: Set COUNTER3 (deflection) to zero.
23h: Set COUNTER4 (general-purpose) to zero
[Control command]
20h 21h 22h 23h
EA
EB
COUNTER
n
+
1
n
+
2
n
n
+
3
n
+
4
n
+
1
n
+
2
n
n
+
3
EA
EB
COUNTER
n
+
1
n
n
+
2
n
+
1
n
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