參數(shù)資料
型號(hào): PCL6045B
廠商: Electronic Theatre Controls, Inc.
英文描述: User Manual For PCL6045B Pulse Control LSI
中文描述: 用戶手冊(cè)PCL6045B脈沖控制大規(guī)模集成電路
文件頁(yè)數(shù): 135/176頁(yè)
文件大?。?/td> 7952K
代理商: PCL6045B
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-
128
-
11-14.
Synchronous
starting
This
LSI
can
perform
the
following
operation
by
setting
the
PRMD
(operation
mode)
register
in
advance.
Start
triggered
by
another
axis
stopping.
Start
triggered
by
an
internal
synchronous
signal
from
another
axis.
The
internal
synchronous
signal
output
is
available
with
9
types
of
timing.
They
can
be
selected
by
setting
the
RENV5
(environment
setting
5)
register.
By
setting
the
RIRQ
(event
interrupt
cause)
register,
an
signal
can
be
output
at
the
same
time
the
internal
synchronous
signal
is
output.
You
can
determine
the
cause
of
event
interrupt
by
reading
the
RIST
register.
The
operation
status
can
be
checked
by
reading
the
RSTS
(extension
status)
register.
Specify
the
synchronous
starting
method
<Set
MSY0
to
1
(bits
18
&
19)
in
PRMD>
10:
Start
with
an
internal
synchronous
signal.
11:
Start
triggered
by
another
axis
stopping.
[RMD]
(WRITE)
23
-
-
-
-
n
n
-
-
16
Select
an
axis
for
confirming
a
stop
(setting
example)
<Specify
the
axis
using
MAX0
to
MAX3
(bits
20
to
23)
in
PRMD>
0001:
Start
when
the
X
axis
stops
0010:
Start
when
the
Y
axis
stops
0100:
Start
when
the
Z
axis
stops
1000:
Start
when
the
U
axis
stops
0011:
Start
when
both
the
X
and
Y
axes
have
stopped
0101:
Start
when
both
the
X
and
Z
axes
have
stopped
1011:
Start
when
the
X,
Y,
and
U
axes
have
all
stopped
1111:
Start
when
all
of
the
axes
have
stopped
Select
the
synchronous
starting
mode
<Set
SMAX
(bit
29)
in
RENV2>
0:
PCL6045
compatible
mode
1:
PCL6045B
mode
[RMD]
(WRITE)
23
n
n
n
n
-
-
-
-
16
[RENV2]
(WRITE)
31
-
-
n
-
-
-
-
-
24
Specify
the
internal
synchronous
signal
output
timing
<Set
SYO1
to
3
(bits
16
to
19)
in
RENV5>
0001:
When
the
Comparator
1
conditions
are
satisfied.
0010:
When
the
Comparator
2
conditions
are
satisfied.
0011:
When
the
Comparator
3
conditions
are
satisfied.
0100:
When
the
Comparator
4
conditions
are
satisfied.
0101:
When
the
Comparator
5
conditions
are
satisfied.
1000:
When
the
acceleration
is
started.
1001:
When
the
acceleration
is
complete.
1010:
When
the
deceleration
is
started.
1011:
When
the
acceleration
is
complete
Others:
Internal
synchronous
output
signal
is
OFF.
Specify
the
input
for
the
internal
synchronous
signal
<Set
SYI0
to
1
(bits
20
&
21)
in
RENV5>
00:
Use
an
internal
synchronous
signal
output
by
the
X
axis.
01:
Use
an
internal
synchronous
signal
output
by
the
Y
axis.
10:
Use
an
internal
synchronous
signal
output
on
the
Z
axis.
11:
Use
an
internal
synchronous
signal
output
on
the
U
axis.
Read
the
operation
status
<CND
(bits
0
to
3)
in
RSTS>
0011:
Wait
for
an
internal
synchronous
signal.
0100:
Wait
for
another
axis
to
stop.
Select
the
event
interrupt
(
output)
cause
<Set
bit
4
to
12
of
RIRQ>
IRUS
(bit
4)
=
1:
When
the
acceleration
is
started.
IRUE
(bit
5)
=
1:
When
the
acceleration
is
complete.
IRUS
(bit
6)
=
1:
When
the
acceleration
is
started.
IRUS
(bit
7)
=
1:
When
the
deceleration
is
complete.
IRC1
(bit
8)
=
1:
When
the
Comparator
1
conditions
are
satisfied.
IRC2
(bit
9)
=
1:
When
the
Comparator
2
conditions
are
satisfied.
IRC3
(bit
10)
=
1:
When
the
Comparator
3
conditions
are
satisfied.
IRC4
(bit
11)
=
1:
When
the
Comparator
4
conditions
are
satisfied.
IRC5
(bit
12)
=
1:
When
the
Comparator
5
conditions
are
satisfied.
[RENV5]
(WRITE)
23
-
-
-
-
n
n
n
n
16
[RENV5]
(WRITE)
23
-
-
n
n
-
-
-
-
16
[RSTS]
(READ)
7
-
-
-
-
n
n
n
n
[RIRQ]
(WRITE)
7
n
n
n
n
-
-
-
-
15
-
-
-
n
n
n
n
n
0
0
8
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