參數(shù)資料
型號(hào): PCL6045B
廠商: Electronic Theatre Controls, Inc.
英文描述: User Manual For PCL6045B Pulse Control LSI
中文描述: 用戶手冊PCL6045B脈沖控制大規(guī)模集成電路
文件頁數(shù): 20/176頁
文件大?。?/td> 7952K
代理商: PCL6045B
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6. CPU Interface
6-1. Setting up connections to a CPU
This LSI can be connected to four types of CPUs by changing the hardware settings.
Use the IF0 and IF1 terminals to change the settings and connect the CPU signal lines as follows.
Setting
status
IF1
IF0
terminal
L
L
68000
+5V
L
H
H8
H
L
8086
H
H
Z80
CPU signal to connect to the 6045B terminals
CPU type
terminal
R/
A0 terminal
terminal
(GND)
(GND)
A0
READY
6-2. Precautions for designing hardware
Apply a CMOS level clock to the CLK terminal.
To reset the LSI, hold the
Connect unused P0 to P7 terminals to VDD5 through a pull up resistor (5 k to 10 K-ohms).
When connecting a CPU with an 8-bit bus, pull up terminals D8 to D15 to VDD5 using an external resistor
(5 k to 10). (Shared use of one resister for the 8 lines is available.)
Use the ELL terminal to change the ±EL signal input logic.
To supply and shut down the power, turn both the 5 V and 3.3 V power supplies ON and OFF
simultaneously, if possible.
Turning ON only one power supply may feed current to the other side, which can shorten the life of the LSI
if this condition continues over time.
signal LOW, and input the CLK signal for at least 8-clock cycles.
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