參數(shù)資料
型號： PCL6045B
廠商： Electronic Theatre Controls, Inc.
英文描述： User Manual For PCL6045B Pulse Control LSI
中文描述： 用戶手冊PCL6045B脈沖控制大規(guī)模集成電路
文件頁數(shù)： 162/176頁
文件大?。?/td> 7952K
代理商： PCL6045B
-
155
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Label
Type
Position
Description
Reference
Deceleration
stop)
(+)
end
limit
signal
for
the
U
axis
(-)
end
limit
signal
for
the
U
axis
(+)
end
limit
signal
for
the
X
axis
(-)
end
limit
signal
for
the
X
axis
(+)
end
limit
signal
for
the
Y
axis
(-)
end
limit
signal
for
the
Y
axis.
(+)
end
limit
signal
for
the
Z
axis
(-)
end
limit
signal
for
the
Z
axis
Invalid
EA,
EB
input
Specify
the
ERC
output
signal
pulse
width
Set
the
output
logic
of
the
ERC
signal
(0:
Negative
logic,
1:
Positive
logic)
Output
an
ERC
signal
Reset
the
output
when
the
ERC
signal
is
set
to
level
output
Driver
deflection
clear
output
for
the
U
axis
Driver
deflection
clear
output
for
the
X
axis
Driver
deflection
clear
output
for
the
Y
axis
Driver
deflection
clear
output
for
the
Z
axis
Automatic
output
of
the
ERC
signal
Auto
output
an
ERC
signal
when
the
zero
return
is
complete
Equals
1
when
stopped
by
the
ALM
input
turning
ON
Equals
1
when
the
positioning
counter
exceeds
the
count
range
Stopped
when
the
comparator1
conditions
(+SL)
are
met
Stopped
when
the
comparator2
conditions
(-SL)
are
met
Stopped
when
the
comaprator3
conditions
(detect
out-of-step)
are
met
Stopped
when
the
comparator4
conditions
are
met.
Stopped
when
the
comparator5
conditions
are
met
Stopped
by
an
operation
data
error
An
EA/EB
input
error
occurred
Stops
by
inputting
ON
input
When
any
other
axis
in
an
interpolation
operation
stops
in
an
emergency,
this
axis
stops
simultaneously
Stopped
because
the
EL
input
turned
ON
A
PA/PB
input
error
occurred
Stopped
because
the
+
EL
input
turned
ON
The
PA/PB
input
buffer
counter
overflowed
Deceleration
stop
caused
by
the
SD
input
turning
ON
Stops
by
inputting
ON
input
Set
the
input
logic
for
the
EZ
signal
(0:
Falling,
1:
Rising)
U
axis
encoder
Z
phase
signal
X
axis
encoder
Z
phase
signal
Y
axis
encoder
Z
phase
signal
Z
axis
encoder
Z
phase
signal
Specify
the
ERC
signal
OFF
timer
Enter
an
EZ
count
value
for
a
zero
return
+ELLu
-ELLu
+ELLx
-ELLx
+ELLy
-ELLy
+ELLz
-ELLz
EOFF
EPW0
to
2
ERCL
ERCOUT
ERCRST
ERCu
ERCx
ERCy
ERCz
EROE
EROR
ESAL
ESAO
ESC1
ESC2
ESC3
ESC4
ESC5
ESDT
ESEE
ESEM
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Register
bit
Register
bit
Register
bit
Command
Command
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
130
131
34
35
66
67
97
98
RENV2
30
RENV1
12-14
RENV1
15
24h
25h
147
59
80
124
RENV1
10
RENV1
11
REST
7
REST
15
REST
0
REST
1
REST
2
REST
3
REST
4
REST
12
REST
16
REST
9
P8,
102
P8,
102
P8,
102
P8,
102
P8,
102
P8,
102
P8,
102
P8,
102
P39,
114
P36,
107
P36,
107
P24,
108
P24,
108
P10,
107
P10,
107
P10,
107
P10,
107
P36,
107
P36,
107
P51,
108
P51
P51
P51
P51
P51
P51
P51
P51
P51,
112
ESIP
Register
bit
REST
13
P51
ESML
ESPE
ESPL
ESPO
ESSD
ESSP
EZL
EZu
EZx
EZy
EZz
ETW0
to
1
EZD0
to
3
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Register
bit
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Register
bits
Register
bits
REST
6
REST
17
REST
5
REST
14
REST
10
REST
8
RENV2
23
137
42
73
106
RENV1
16-17
RENV3
4-7
P51,
102
P51,
60
P51,
103
P51,
60
P51,
104
P51
P39,
65
P9,
65
P9,
65
P9,
65
P9,
65
P36,
108
P41,
65
FCHGH
FCHGL
FLTR
FSCHH
FSCHL
FT0
to
15
Command
Command
Register
bit
Command
Command
Register
bits
41h
40h
RENV1
26
43h
42h
RENV7
16-31
Change
immediately
to
FH
speed
Change
immediately
to
FL
speed
Apply
input
filter
Accelerate
to
FH
speed
Accelerate
to
FL
speed
Enter
an
FT
time
for
the
vibration
reduction
function
P22
P22
P37
P22
P22
P45,
127
IDC0
to
2
IDL0
to
2
IDXM
IEND
IF0
IF1
IFB
INPL
INPu
INPx
INPy
INPz
Register
bits
Register
bits
Register
bit
Register
bit
Terminal
name
Terminal
name
Terminal
name
Register
bit
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Terminal
name
Register
bit
Sub-status
bits
RSPD
20-22
RENV5
8-10
RENV4
23
RENV2
27
1
2
14
RENV1
22
150
49
85
113
11
RENV1
29
SSTSW
0-7
"2
"
when
using
a
Z80
RIPS
19
RIPS
18
RIPS
17
RIPS
7
Monitor
the
idling
count
(0
to
7
pulses)
Enter
the
number
of
idling
pulse
(0
to
7
pulses)
Select
IDX
output
specification
(0:
Level
output,
1:
Pulse
output)
Specify
that
the
stop
interrupt
will
be
output.
CPU-I/F
mode
selection
0
CPU-I/F
mode
selection
1
Busy
CPU-I/F
P53,
101
P44,
101
P43,
124
P39,
136
P7,
13
P7,
13
P8
P37,
106
P10,
106
P10,
106
P10,
106
P10,
106
P7,
135
P37,
136
P20
In
position
input
for
the
U
axis
In
position
input
for
the
X
axis
In
position
input
for
the
Y
axis
In
position
input
for
the
Z
axis
Interrupt
request
signal
Mask
the
INT
output
terminal
Read
the
P0
to
P7
terminal
status.
INTM
IOP0
to
7
IOPB
Byte
map
name
Read
the
general
I/O
port
P16,
20
IPCC
IPCW
IPE
IPEu
Register
bit
Register
bit
Register
bit
Register
bit
Executing
a
CCW
circular
interpolation
Executing
a
CW
circular
interpolation
Executing
a
linear
interpolation
by
entering
master
axis
feed
amount
U
axis
linear
interpolation
mode
from
a
specified
master
axis
feed
amount
P54
P54
P54
P54
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