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Functional Overview
77
August 2002 Revised August 2003
SPRS197B
Table 341. DSP MMU Registers
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
FFFE:D200
DSP_MMU_PREFETCH_REG
DSP MMU Prefetch Register
32
RW
0000h
FFFE:D204
DSP_MMU_WALKING_ST_REG
DSP MMU Prefetch Status Register
32
R
0000h
FFFE:D208
DSP_MMU_CNTL_REG
DSP MMU Control Register
32
RW
0000h
FFFE:D20C
DSP_MMU_FAULT_AD_H_REG
DSP MMU Fault Address Register MSB
32
R
0000h
FFFE:D210
DSP_MMU_FAULT_AD_L_REG
DSP MMU Fault Address Register LSB
32
R
0000h
FFFE:D214
DSP_MMU_F_ST_REG
DSP MMU Fault Status Register
32
R
0000h
FFFE:D218
DSP_MMU_IT_ACK_REG
DSP MMU IT Acknowledge Register
32
W
0000h
FFFE:D21C
DSP_MMU_TTB_H_REG
DSP MMU TTB Register MSB
32
RW
0000h
FFFE:D220
DSP_MMU_TTB_L_REG
DSP MMU TTB Register LSB
32
RW
0000h
FFFE:D224
DSP_MMU_LOCK_REG
DSP MMU Lock Counter Register
32
RW
0000h
FFFE:D228
DSP_MMU_LD_TLB_REG
DSP MMU Load Entry TLB Register
32
RW
0000h
FFFE:D22C
DSP_MMU_CAM_H_REG
DSP MMU CAM Entry Register MSB
32
RW
0000h
FFFE:D230
DSP_MMU_CAM_L_REG
DSP MMU CAM Entry Register LSB
32
RW
0000h
FFFE:D234
DSP_MMU_RAM_H_REG
DSP MMU RAM Entry Register MSB
32
RW
0000h
FFFE:D238
DSP_MMU_RAM_L_REG
DSP MMU RAM Entry Register LSB
32
RW
0000h
FFFE:D23C
DSP_MMU_GFLUSH_REG
DSP MMU Global Flush Register
32
RW
0000h
FFFE:D240
DSP_MMU_FLUSH_ENTRY_REG
DSP MMU Individual Flush Register
32
RW
0000h
FFFE:D244
DSP_MMU_READ_CAM_H_REG
DSP MMU Read CAM Register MSB
32
RW
0000h
FFFE:D248
DSP_MMU_READ_CAM_L_REG
DSP MMU Read CAM Register LSB
32
RW
0000h
FFFE:D24C
DSP_MMU_READ_RAM_H_REG
DSP MMU Read RAM Register MSB
32
RW
0000h
FFFE:D250
DSP_MMU_READ_RAM_L_REG
DSP MMU Read RAM Register LSB
32
RW
0000h
Table 342. MPUI Registers
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
FFFE:C900
CTRL_REG
MPUI Control Register
32
RW
0003 FF1Bh
FFFE:C904
DEBUG_ADDR
MPUI Debug Address Register
32
R
01FF FFFFh
FFFE:C908
DEBUG_DATA
MPUI Debug Data Register
32
R
FFFF FFFFh
FFFE:C90C
DEBUG_FLAG
MPUI Debug Flag Register
32
R
0800h
FFFE:C910
STATUS_REG
MPUI Status Register
32
R
0000h
FFFE:C914
DSP_STATUS_REG
MPUI DSP Status Register
32
R
undef
FFFE:C918
DSP_BOOT_CONFIG
MPUI Boot Configuration Register
32
RW
0000h
FFFE:C91C
DSP_MPUI_CONFIG
MPUI DSP MPUI Configuration Register
32
RW
FFFFh
Table 343. TIPB (Private) Bridge 1 Configuration Registers
BYTE
ADDRESS
REGISTER NAME
DESCRIPTION
ACCESS
WIDTH
ACCESS
TYPE
RESET
VALUE
FFFE:CA00
TIPB_CNTL
Private TIPB Control Register
32
RW
FF11h
FFFE:CA04
TIPB_BUS_ALLOC
Private TIPB Bus Allocation Register
32
RW
0009h
FFFE:CA08
MPU_TIPB_CNTL
Private MPU TIPB Control Register
32
RW
0000h
FFFE:CA0C
ENHANCED_TIPB_CNTL
Private Enhanced TIPB Control Register
32
RW
0007h
FFFE:CA10
ADDRESS_DBG
Private Debug Address Register
32
R
FFFFh
FFFE:CA14
DATA_DEBUG_LOW
Private Debug Data LSB Register
32
R
FFFFh
FFFE:CA18
DATA_DEBUG_HIGH
Private Debug Data MSB Register
32
R
FFFFh
FFFE:CA1C
DEBUG_CNTR_SIG
Private Debug Control Signals Register
32
R
00F8h