參數(shù)資料
型號: OMAP5910(DSP)
英文描述: Dual-Core Processor
中文描述: 雙核處理器
文件頁數(shù): 152/160頁
文件大?。?/td> 1997K
代理商: OMAP5910(DSP)
Electrical Specifications
140
August 2002 Revised August 2003
SPRS197B
5.15 Universal Serial Bus (USB) Timings
All OMAP5910 USB interfaces are compliant with the
Universal Serial Bus Specification, Revision 2.0
.
Table 531 assumes testing over recommended operating conditions (see Figure 534).
Table 531. USB Integrated Transceiver Interface Switching Characteristics
NO.
PARAMETER
LOW SPEED
1.5 Mbps
FULL SPEED
12 Mbps
UNIT
MIN
75
75
80
1.3
25§
MAX
300
300
125
2.0
25§
MIN
4
4
90
1.3
MAX
20
20
U1
tr
tf
tRFM
VCRS
tjr
fop
Rise time, USB.DP and USB.DM signals
Fall time, USB.DP and USB.DM signals
Rise/Fall time matching
Output signal cross-over voltage
Differential propagation jitter§
Operating frequency
ns
U2
ns
U3
111.11
2.0
%
U4
V
U5
ns
U6
1.5
12
MHz
Low Speed: CL = 200 pF, Full Speed: CL = 50 pF
tRFM = (tr/tf) x 100
§tjr = tpx(1) tpx(0)
fop = 1/tper
VOL
U1
U2
VCRS
USB.DP
VOH
90%
10%
REF clock
USB.DM
tpx(0)
tpx(1)
tper tjr
“REF clock” is not an actual device signal, but an ideal reference clock against which relative timings are specified. REF clock is assumed to be
12 MHz for full-speed mode or 1.5 MHz for low-speed mode).
Figure 534. USB Integrated Transceiver Interface Timings
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