參數(shù)資料
型號： OMAP5910(DSP)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 30/160頁
文件大小： 1997K
代理商： OMAP5910(DSP)
Introduction
18
August 2002 Revised August 2003
SPRS197B
Table 23. Terminal Characteristics and Multiplexing (Continued)
SUPPLY
RESET
STATE#
OTHER
BUFFER
STRENGTH
PU/
PD
§
DESELECTED
INPUT STATE
MUX CTRL
SETTING
TYPE
SIGNAL NAME
GDY
BALL
GZG
BALL
AA5
R5
MCBSP2.DX
O
regC[17:15] = 000
NA
4 mA
J, E, G2
0
MCBSP2.DR
I
regC[17:15] = 001
NA
PD20
DVDD3
R9
M7
UART2.RX
I
regC[20:18] = 000
1
PD20
4 mA
J, B
input
USB2.VM
I
regC[20:18] = 001
0
PD20
DVDD3
Y5
N6
UART2.CTS
I
regC[23:21] = 000
1
PD20
4 mA
J, B
input
USB2.RCV
I
regC[23:21] = 001
0
PD20
J, B
DVDD3
GPIO7
I/O/Z
regC[23:21] = 010
NA
PD20
J, E
W5
U4
pin forced to drive low
O
regC[26:24] = 000
NA
4 mA
J, E, G2
0
UART2.RTS
O
regC[26:24] = 001
NA
DVDD3
USB2.SE0
O
regC[26:24] = 010
NA
MPUIO5
I/O/Z
regC[26:24] = 011
NA
V6
R4
pin forced to drive low
O
regC[29:27] = 000
NA
4 mA
J, A, G2
0
UART2.TX
O
regC[29:27] = 001
NA
DVDD3
USB2.TXD
O
regC[29:27] = 010
NA
Y4
T4
UART2.BCLK
O
NA
NA
4 mA
J, A, G2
0
DVDD3
W4
T3
USB.PUEN
O
regD[5:3] = 000
NA
8 mA
J, B, G1
0
USB.CLKO
O
regD[5:3] = 001
NA
DVDD2
P9
P5
USB.DP
I/O/Z
NA
NA
18.3 mA
C
Z
DVDD2
DVDD2
NA
R8
P4
USB.DM
I/O/Z
NA
NA
18.3 mA
C
Z
Y2
R2
OSC1_IN
NA
NA
F
NA
W3
P3
OSC1_OUT
NA
NA
F
NA
NA
V4
R3
FLASH.WP
O/Z
NA
NA
4 mA
A
0
DVDD5
DVDD5
DVDD5
DVDD5
DVDD5
W2
P2
FLASH.WE
O/Z
NA
NA
4 mA
A
1
W1
T2
FLASH.RP
O/Z
NA
NA
4 mA
A
0
U4
N3
FLASH.OE
O/Z
NA
NA
4 mA
A
1
V3
T4
U3
U1
P8
T3
T2
R4
R3
R2
P7
P4
P2
N7
N2
N4
U2
T1
N2
R1
M3
P1
N1
N4
M5
M4
M2
M1
L6
L4
K3
L5
FLASH.D[15:0]
I/O/Z
NA
NA
4 mA
E
0
N3
K4
FLASH.CLK
O/Z
NA
NA
8 mA
E, G1, H2
0
DVDD5
DVDD5
N8
I = Input, O = Output, Z = High-Impedance
’regx’ denotes the terminal multiplexing register that controls the specified terminal where regx = FUNC_MUX_CTRL_x
§PD20 = 20-
μ
A internal pulldown, PD100 = 100-
μ
A pulldown, PU20 = 20-
μ
A internal pullup, PU100 = 100-
μ
A internal pullup
A = Standard LVCMOS input/output
B = Fail-safe LVCMOS input/output
C = USB transceiver input/output
D = I2C input/output buffers
E = Fail-safe LVCMOS input and Standard LVCMOS output
F = analog oscillator terminals
#Z = High-Impedance, LZ = Low-Impedance (pin is driven), 1 = Output driven high, 0 = Output driven low
|| UART1 signals can be multiplexed to this pin via additional multiplexing in the USB module.
L1
FLASH.CS3
O/Z
NA
NA
4 mA
A
1
G1 = Terminal may be gated by BFAIL
G2 = Terminal may be gated by GPIO9 and MPUIO3
G3 = Terminal may be gated by BFAIL and PWRON_RESET
H1 = Terminal may be 3-stated by BFAIL input
J = Boundary-scannable terminal
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