參數(shù)資料
型號： OMAP5910(DSP)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 44/160頁
文件大小： 1997K
代理商： OMAP5910(DSP)
Introduction
32
August 2002 Revised August 2003
SPRS197B
Table 24. Signal Description (Continued)
GDY
BALL
SIGNAL
TYPE
DESCRIPTION
GZG
BALL
Power Supplies (Continued)
CVDDA
Y21
R15
Analog supply voltage. Supplies power to ULPD DPLL which provides an internal
clock to the USB peripherals.
NOTE:
The voltage to this supply pin should be kept
as clean as possible to maximize performance.
power
DVDD1
A15,
A19,
E21,
L21,
U21,
AA11,
Y16
C12,
A14,
E14,
H13,
U21,
P9,
T12
I/O Supply Voltage 1. Supplies power to the majority of peripheral I/O buffers.
DVDD1 may be connected in common with the other DVDD supplies if the same
operating voltage is desired.
power
DVDD2
AA2
U3
I/O Supply Voltage 2. Supplies power to the internal USB transceiver buffers.
DVDD2 may optionally be used for USB connect & disconnect detection by
connecting DVDD2 to the power from the USB bus in the system. DVDD2 may be
connected in common with the other DVDD supplies if the same operating voltage
is desired.
power
DVDD3
Y7
N7
I/O Supply Voltage 3. Supplies power to the MCSI2 and McBSP2 peripheral I/O
buffers as well as GPIO[9:8] I/O buffers. The DVDD3 supply may operate within a
high-voltage or low-voltage range (see Section 5.2 for operating conditions).
DVDD3 may be connected in common with the other DVDD supplies if the same
operating voltage is desired.
power
DVDD4
A1,
A5,
A7,
B10,
B12
D3,
D5,
A5,
D8,
E10
I/O Supply Voltage 4. Supplies power to the SDRAM interface I/O buffers. The
DVDD4 supply may operate within a high-voltage or low-voltage range (see
Section 5.2 for operating conditions). DVDD4 may be connected in common with
the other DVDD supplies if the same operating voltage is desired.
power
DVDD5
C2,
E1,
H2,
L1,
P3,
R1,
V2
H7,
D1,
F1,
K6,
L2,
L3,
U1
I/O Supply Voltage 5. Supplies power to the FLASH interface I/O buffers. The
DVDD5 supply may operate within a high-voltage or low-voltage range (see
Section 5.2 for operating conditions). DVDD5 may be connected in common with
the other DVDD supplies if the same operating voltage is desired.
power
I = Input, O = Output, Z = High-Impedance
All core voltage supplies should be tied to the same voltage level (within 0.3 V). During system prototyping phases, it may be useful to maintain
a capability for independent measurement of core supply currents to facilitate power optimization experiments.
§See Sections 5.6.1 and 5.6.2 for special VSS considerations with oscillator circuits.
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