參數(shù)資料
型號： OMAP5910(DSP)
英文描述： Dual-Core Processor
中文描述： 雙核處理器
文件頁數(shù)： 136/160頁
文件大小： 1997K
代理商： OMAP5910(DSP)
Electrical Specifications
124
August 2002 Revised August 2003
SPRS197B
5.9
Multichannel Buffered Serial Port (McBSP) Timings
5.9.1 McBSP Transmit and Receive Timings
Table 514 and Table 515 assume testing over recommended operating conditions (see Figure 518 and
Figure 519). In Table 514 and Table 515, “ext” indicates that the device pin is configured as an input (slave)
driven by an external device and “int” indicates that the pin is configured as an output (master).
Table 514. McBSP Timing Requirements
NO.
MIN
MAX
UNIT
M11
tc(CKRX)
tw(CKRX)
Cycle time, CLKR/X
CLKR/X ext
2P
ns
M12
Pulse duration, CLKR/X high or CLKR/X low
CLKR/X ext
0.45P
ns
McBSP1
CLKR/X ext
12
M13
tr
Rise time, CLKR/X, MCBSP2.FSR/X
McBSP2
CLKR/X ext,
MCBSP2.FS
R/X ext
12
ns
McBSP3
CLKR/X ext
6
McBSP1
CLKR/X ext
12
M14
tf
Fall time, CLKR/X, MCBSP2.FSR/X
McBSP2
CLKR/X ext,
MCBSP2.FS
R/X ext
12
ns
McBSP3
CLKR/X ext
CLKX int§
CLKX ext§
6
McBSP1
(FSX)
25
31
M15
tsu(FRH-CKRL)
high before CLKR/X low§
McBSP2
(FSR)
CLKR int
25
ns
Setup time, external receiver frame sync (FSR/X)
CLKR ext
CLKX int§
CLKX ext§
CLKX int§
CLKX ext§
7
McBSP3
(FSX)
24
15
McBSP1
(FSX)
3
16
M16
th(CKRL-FRH)
after CLKR/X low§
McBSP2
(FSR)
CLKR int
3
ns
Hold time, external receiver frame sync (FSR/X) high
CLKR ext
CLKX int§
CLKX ext§
CLKX int§
CLKX ext§
3
McBSP3
(FSX)
13
13
McBSP1
21
3
M17
tsu(DRV-CKRL)
Setup time, DR valid before CLKR/X low§
McBSP2
CLKR int
22
ns
CLKR ext
CLKX int§
CLKX ext§
3
McBSP3
19
10
Polarity bits CLKRP = CLKXP = FSRP = FSXP = 0. If the polarity of any of the signals is inverted, then the timing references of
that signal are
also inverted.
P = 1/(Base frequency) for McBSP 1 and 3, or 1/(ARMPER_CK clock frequency) in nanoseconds (ns) for McBSP 2. Base frequency is 12
or 13 MHz.
§For McBSP1 and McBSP2, the receiver clock and frame sync inputs are driven by FSX and CLKX via internal loopback connections enabled
via software configuration.
相關(guān)PDF資料
PDF描述
OMAP5910(RISC) Dual-Core Processor
OMC506 Closed Loop Speed Controller For 3-Phase Brushless DC Motor MP-3T Package
OMC507 5 Amp. Push-Pull 3-Phase Brushless DC Motor Controller Driver(5A,推挽三相無刷直流電機控制驅(qū)動器)
OMC510 36V Hi-Rel Three-Phase Brushless DC Motor Controller in a PCB-1 package
OMC510 DSP-Based Three-Phase Brushless DC Motor Controller(基于DSP的三相無刷直流電機控制器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OMAP5910GGZG1 制造商:Rochester Electronics LLC 功能描述:- Bulk
OMAP5910GGZG2 制造商:Rochester Electronics LLC 功能描述:- Bulk
OMAP5910JGDY1R 功能描述:IC OMAP DUAL-CORE PROC 289-BGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:OMAP-59xx 標(biāo)準(zhǔn)包裝:60 系列:SCC 處理器類型:Z380 特點:全靜電 Z380 CPU 速度:20MHz 電壓:5V 安裝類型:表面貼裝 封裝/外殼:144-LQFP 供應(yīng)商設(shè)備封裝:144-LQFP 包裝:托盤
OMAP5910JGDY2 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Applications Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
OMAP5910JGZG1 制造商:Texas Instruments 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*