參數(shù)資料
型號(hào): CD2481
廠商: Intel Corp.
英文描述: Programmable Four-Channel Communications Controller
中文描述: 可編程四通道通信控制器
文件頁(yè)數(shù): 80/222頁(yè)
文件大小: 974K
代理商: CD2481
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CD2481
Programmable Four-Channel Communications Controller
80
Datasheet
7.2.6.3
Transmission of Abort
When commanded through the AbortTx bit in the Special Transmit Command Register (STCR[6]),
the CD2481 ends the transmission of the current frame with an abort sequence of 7D
7E. After
executing the abort, the CD2481 clears the STCR. The rules for shared flag transmission in
Section
7.2.6.2
are followed for the trailing flag (7E) of the abort sequence (7D
7E).
If the CD2481 is not sending a frame when the command bit is set, the chip clears the STCR, and
sends no abort sequence.
7.2.6.4
Transmit Framing Error
For test purposes, one character with a framing error may be transmitted inside a frame. The Frame
bit (STCR[2]) notifies the CD2481 to transmit one character with stop bit forced to 0. If the
channel is transmitting a frame, one framing error character is inserted. After transmission, the
channel continues with the frame transmission. After executing the command, the device clears the
STCR.
If the CD2481 is not sending a frame when the command bit is set, the it clears the STCR, and
sends no framing error character.
7.2.7
Receiver
7.2.7.1
Fixed Receiver Operations
The receiver is said to accept a frame or to accept a character when the received data are brought
through the CD2481 and presented to the host.
In async-HDLC mode, the receiver accepts only characters of the format shown in
Section 7.2.1
.
The receiver accepts only frames that have an opening flag. There may be more than one opening
flag.
7.2.7.2
Receiver Options
The CD2481 receiver may be control-bit selected for the following options:
Option
Description
map32
(ATBSTS)
(BTBSTS)
When map32 is set, all the characters in the TXACCM (00
1F) are mapped. All 32
characters are transmitted with a preceding 7D, and with bit 6 flipped.
When clear, the normal TXACCM is used.
npad3, 2, 1, 0
(COR3)
The minimum number idle character times between transmitted frames is programmable
from 0 to 15 character times.
TxGen
(COR3)
If TxGen is set, the chip adds the two character FCS at the end of each frame.
If TxGen is clear, the chip ends the frame with a closing flag after the last data byte from
the host.
frame
(STCR)
When commanded by setting the frame bit in STCR, the chip sends one character in the
frame with the stop bit forced to 0.
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