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參數(shù)資料
| 型號(hào)： | CD2481 |
| 廠商： | Intel Corp. |
| 英文描述： | Programmable Four-Channel Communications Controller |
| 中文描述： | 可編程四通道通信控制器 |
| 文件頁數(shù)： | 54/222頁 |
| 文件大小： | 974K |
| 代理商： | CD2481 |
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CD2481
—
Programmable Four-Channel Communications Controller
54
Datasheet
the same register
—
ARBCNT. (Recognize that the host has written the maximum buffer size
in ARBCNT when the buffer is given to the CD2481, but when the buffer is returned to the
host, the CD2481 has written the actual byte count of the received buffer into ARBCNT.)
6. The CD2481 sets the EOB and EOF bits. This notifies the host that the end of the buffer and
frame have been reached. The CD2481 also clears the 2481OWN bit to give the buffer back to
the host.
Example 2
Receive a frame on channel 0, which consists of three buffers chained together. The frame is 240
bytes long, and the maximum buffer size is 100.
1. The host checks the Nrbuf bit in the DMABSTS register for channel 0 to determine which
buffer is next. In this example, Nrbuf is set to
‘
1
’
indicates buffer B is used next.
2. The host sets up the starting address
—
BRBADR. Buffer size is set to 100 in this example.
Thus, the host sets BRBCNT is set to 100.
3. The host then sets the 2481OWN bit to give ownership to the CD2481.
4. The host should know the amount of time it takes to receive 100 bytes, because this is the
minimum time the host has to set up the next buffer link. If the host fails to do this in time,
there is a receiver overrun, and the received frame is lost.
5. Suppose that the CD2481 starts receiving data into buffer B of channel 0. When this is started,
the Nrbuf bit is cleared to
‘
0
’
by the CD2481 to help the host keep track of which buffer is
next. (During this time or prior, the host has made buffer A ready.)
6. After the CD2481 has received the first link of the frame into buffer B, it sets the EOB and
SOB bits and clears the EOF bit. This indicates that the first link in a chain has been received.
Also, the CD2481 clears the 2481OWN bit, and returns ownership of the buffer to the host.
For the first received link, the received byte count (BRBCNT) remains unchanged at 100,
since the received data filled the buffer.
7. The CD2481 optionally interrupts the host with EOF clear and EOB set in the RISR to indicate
that the received buffer is complete, and that there was chaining.
8. The CD2481 now sees from the ARBSTS register that it has ownership of buffer A for
transmission of the next link.
9. As the frame continues to be received, the data goes into buffer A. This is the second link that
is 100 bytes long. During this time, the host must set up a new buffer B for the third and final
link.
10. After the CD2481 has received the second link into buffer A, it sets EOB bit and clears the
2481OWN bit in the ARBSTS. This gives ownership of the buffer back to the host.
As with the first link, the received byte count
—
ARBCNT, remains unchanged at 100 since
the received data filled the buffer.
11. The CD2481 optionally interrupts the host with EOF clear and EOB set in the RISR to indicate
that the received buffer is complete, and there was chaining.
12. By this time, the host has set up a new buffer for buffer B.
13. The CD2481 receives data into buffer B in the same manner explained earlier.
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