- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379804 > CD2481 (Intel Corp.) Programmable Four-Channel Communications Controller PDF資料下載
參數(shù)資料
| 型號： | CD2481 |
| 廠商： | Intel Corp. |
| 英文描述： | Programmable Four-Channel Communications Controller |
| 中文描述： | 可編程四通道通信控制器 |
| 文件頁數(shù)： | 59/222頁 |
| 文件大?。?/td> | 974K |
| 代理商： | CD2481 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁當(dāng)前第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁
Programmable Four-Channel Communications Controller
—
CD2481
Datasheet
59
When a receive error occurs, the device stops DMA at the point of error and generates a bus error
receive exception interrupt. RISR indicates the cause of the exception, and RCBADR provides the
next location in the receive buffer.
The CPU has the following five options:
1. Terminate the buffer.
2. Discard the exception.
3. Terminate the buffer and discard the exception.
4. Continue from the current position in the buffer.
5. Leave
‘
n
’
byte gap in the buffer and then continue.
The required option is written to the REOIR (Receive End-of-Interrupt register) by the CPU to
terminate the interrupt. If the terminate buffer option is chosen, the 2481OWN bit in the A/
BRBSTS register should first be cleared by the CPU, or a new buffer can be supplied by the CPU.
5.4.7.7
Receive Time-Out in Asynchronous DMA Mode
In Asynchronous DMA mode, the only way that the CD2481 releases the ownership is reaching the
end-of-buffer. Receive time-out or any exceptions do not release the ownership if end-of-buffer
condition is not met. The following illustrates recommended procedures to handle receive time-out
in Asynchronous DMA mode.
Scenario 1:
Buffer A is currently selected, receive time-out occurs, host wants to continue on.
Recommendation:
Do nothing in the receive time-out interrupt service routine.
Scenario 2:
Buffer A is currently selected, receive time-out occurs, host does not require DMA
anymore.
Recommendation:
Reset ownership bits in A(B) RBSTS, and set TermBuff in REOIR in the
receive time-out interrupt service routine.
Scenario 3:
Buffer A is currently used, receive time-out occurs, host wants to start DMA in buffer
B.
Recommendation:
Set TermBuff in REOIR in the receive time-out interrupt service routine. The
CD2481 switches to buffer B.
Note:
When a receive time-out occurs in buffer B, the CD2481 pops back to buffer A, unless the host
clears both Ownership Status bits.
The above scenarios apply if buffer B is selected first.
5.4.7.8
Receive Bus Errors
When a receive bus error interrupt is generated, the RISR and A/BRBSTS registers both indicate a
bus error status. The current transfer address is available in the RCBADR[0
–
3] registers, the bus
error occurred on the last transfer that started at this address. This means that the actual error
address can be up to 16 bytes further on in the buffer.
Following a bus-error condition, the CPU has the choice of either discontinuing the current buffer,
or retrying from the start of the last transfer. If the buffer is to be discontinued, the number of valid
receive bytes can be calculated by subtracting the starting address A/BRBADR[0
–
3] from the
current address RCBADR[0
–
3]. The CPU should set the TermBuff bit in REOIR to terminate this
buffer and move to the next.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CD3086 | General Purpose NPN Transistor Array |
| CD4000 | CMOS NOR Gates |
| CD4001 | CMOS NOR Gates |
| CD4002 | CMOS NOR Gates |
| CD40011 | Quad 2-Input NOR,NAND Buffered B Series Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD24B3 031573 | 制造商:Comair Rotron 功能描述:FAN 254MM 24VDC |
| CD24B3 | 制造商:Comair Rotron 功能描述:FAN 254MM 24VDC |
| CD-250 | 制造商:Stellar Labs 功能描述:CD / USB Media Player with FM Tuner - MP3 and WMA |
| CD2500R1 | 制造商:LOGETR 功能描述: |
| CD250-3KVM.25 | 制造商:Yageo / Phycomp 功能描述:CD250-3KVM.25 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。