
Datasheet
5
Programmable Four-Channel Communications Controller
—
CD2481
7.6.3
7.6.4
7.6.5
X.21 Call Set-Up Mode........................................................................................97
7.7.1
X.21 Transmit.........................................................................................97
7.7.2
X.21 Receive..........................................................................................97
Extended X.21 Mode...........................................................................................99
7.8.1
Extended X.21 Transmit.........................................................................99
7.8.2
Extended X.21 Receive..........................................................................99
Programmable Sync..........................................................................................100
7.9.1
Programmable Sync Transmit..............................................................101
7.9.2
Programmable Sync Receive...............................................................101
Non-8-Bit Data Transfers ..................................................................................102
Programming Examples
......................................................................................103
8.1
Global Initialization............................................................................................105
8.2
Async Interrupt Setup Example.........................................................................107
8.3
HDLC DMA Channel Setup Example................................................................107
8.4
Receive DMA Interrupt Service Routine............................................................109
8.5
Transmit Interrupt Service Routine....................................................................110
8.6
Support Files from the Intel FTP Server............................................................110
Detailed Register Descriptions
........................................................................112
9.1
Global Registers................................................................................................112
9.1.1
Global Firmware Revision Code Register (GFRCR)............................112
9.1.2
Channel Access Register (CAR)..........................................................112
9.2
Option Registers................................................................................................113
9.2.1
Channel Mode Register (CMR)............................................................113
9.2.2
Channel Option Register 1 (COR1)......................................................114
9.2.3
Channel Option Register 2 (COR2)......................................................116
9.2.4
Channel Option Register 3 (COR3)......................................................123
9.2.5
Channel Option Register 4 (COR4)......................................................130
9.2.6
Channel Option Register 5 (COR5)......................................................131
9.2.7
9.2.8
Channel Option Register 7 (COR7)......................................................135
9.2.9
Special Character Registers
–
Async and Programmable Sync Modes136
9.2.10 Special Character Range
–
Async Mode Only.....................................138
9.2.11 LNext Character (LNXT)
–
Async Mode Only ......................................139
9.2.12 Receive Frame Address Registers
–
HDLC Sync Mode Only .............139
9.2.13 CRC Polynomial Select Register (CPSR) ............................................141
9.2.14 Transmit Special Mapped Characters
–
PPP Mode only .....................141
9.2.15 Transmit Async Control Character Maps
–
Async-HDLC/PPP Mode Only142
9.2.16 Receive Async Control Character Maps
–
Async-HDLC/PPP Mode Only143
9.3
Bit Rate and Clock Option Registers.................................................................145
9.3.1
Receive Baud Rate Generator Registers.............................................145
9.3.2
Transmit Baud Rate Generator Registers............................................146
9.4
Channel Command and Status Registers.........................................................148
9.4.1
Channel Command Register (CCR).....................................................148
CRC Calculation in Bisync Mode ...........................................................93
BCC Computation Formulas ..................................................................94
Receive State Tables.............................................................................95
7.7
7.8
7.9
7.10
8.0
9.0