
Programmable Four-Channel Communications Controller
—
CD2481
Datasheet
159
Either of these registers is read to determine the current input levels on the input modem pins. Note
that the pin definitions for these signals is negative true while the register values are positive true.
Two registers are provided for control of the outputs
—
DTR and RTS. Writing to the MSVR-DTR
register affects only the DTR pin. Writing to the MSVR-RTS register affects only the RTS pin.
Bit 7
DSR
–
Current state of data set ready input
Bit 6
CD
–
Current state of carrier detect input
Bit 5
CTS
–
Current state of clear to send input
Bit 4
DTR option
–
written by MSVR-DTR register
0 = value of DTR bit is output on TXCOUT/DTR* pin
1 = Transmit clock is output on TXCOUT/DTR* pin
Note:
If the transmit clock source is a 1
×
clock on the TXCIN pin, this signal cannot be driven on
TXCOUT/DTR*.
Bit 3:2
Reserved
–
returns
‘
0
’
when read; writing has no effect
Bit 1
DTR
–
Current state of data terminal ready output
Bit 0
RTS
–
Current state of request to send output
9.5
Interrupt Registers
9.5.1
General Interrupt Registers
9.5.1.1
Local Interrupt Vector Register (LIVR)
The host effectively controls bits 7:2; the device provides bits 1 and 0 within an interrupt
acknowledge context.
The CD2481 has one Local Interrupt Vector register per channel, each with six host-defined bits.
The host can choose to embed the channel number and the protocol in use on the channel in the
channel vector. The CD2481 supplies two modified bits signifying the type of interrupt service
required.
Bits 7:2
User-defined. These six bits can be used as the CD2481 device ID number.
Bits 1:0
Interrupt type. These three bits indicate the group/type of interrupt occurring.
Register Name: LIVR
Register Description: Local Interrupt Vector Register
Default Value: x
’
00
Access: Byte Read/Write
Intel Hex Address: x
’
0A
Motorola Hex Address: x
’
09
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
IT1
IT0