參數(shù)資料
型號(hào)： HYB25M128160C
廠商： SIEMENS AG
英文描述： 128-Mbit direct RDRAM(128 Mbit 直接 RDRAM)
中文描述： 128 - Mbit的直接的RDRAM（128兆直接的RDRAM）
文件頁數(shù)： 66/93頁
文件大?。?/td> 919K
代理商： HYB25M128160C
Direct RDRAM
128/144-MBit (256K
×
16/18
×
32s)
Data Book
66
2.00
This example uses four COLX packets with a CAL command. These cause the RDRAM to drive four
calibration packets Q(a0) a time
t
CAC
later. An offset of
t
RDTOCC
must be placed between the Q(a0)
packet and read data Q(a1)from the same device. These calibration packets are driven on the
DQA4 … 3 and DQB4 … 3 wires. The TSQ bit of the INIT register is driven on the DQA5 wire during
same interval as the calibration packets. The remaining DQA and DQB wires are not used during
these calibration packets. The last COLX packet also contains a SAM command (concatenated with
the CAL command). The RDRAM samples the last calibration packet and adjusts its
I
OL
current
value.
Unlike REF commands, CAL and SAM commands cannot be broadcast. This is because the
calibration packets from different devices would interfere. Therefore, a current control transaction
must be sent every
t
CCTRL
/N, where N is the number of RDRAMs on the Channel. The device field
Da of the address a0 in the CAL/SAM command should be incremented after each transaction.
Figure 23
shows an example of a temperature calibration sequence to the RDRAM. This sequence
is broadcast once every
t
TEMP
interval to all the RDRAMs on the Channel. The TCEN and TCAL are
ROP commands, and cause the slew rate of the output drivers to adjust for temperature drift. During
the quiet interval
t
TCQUIET
the devices being calibrated can’t be read, but they can be written.
Figure 51
Current Control CAL/SAM Transaction Example
HotTemp = DQA5
Note that DQB3 could be used instead of DQA3.
When used for monitoring, it should be enabled with the DQA3
bit (current control one value) in case there is no RDRAM present:
DQA3
*
control register; i.e. logic 0 or high voltage means hot temperature.
DQA5 of the first calibrate packet has the inverted TSQ bit of INIT
READTOCC
Transaction a2: CAL/SAM
Transaction a0: CAL/SAM
Transaction a1: RD
COL4...COL0
DQB8...0
DQA8...0
Q (a1)
t
CAL a0
a1 = {Da, Bx}
a2 = {Da, Bx}
CAL/SAM a0
Q (a0)
a0 = {Da, Bx}
CAL a0
t
CAC
CAL a0
CAL a2
Q (a1)
CCSAMTOREAD
t
SPT04237
T24
packet position or earlier.
command must be at this
device from an earlier RD
Read data from the same
ROW0
ROW2...
CTM/CFM
T2
T0
T1
T3
T4
T14
device from an earlier RD
command can be anywhere
prior to the Q(a0) packet.
Read data from a different
T5
T6
T8
T7
T9
T10 T11
T13
T12
t
T19
T15 T16
T18
T17
T20 T21
T23
T22
packet position or later.
device from a later RD
command must be at this
Read data from a different
T34
Read data from a different
device from a later RD
command can be anywhere
after to the Q(a0) packet.
CCTRL
T29
T25 T26 T27 T28
T31
T30
T32 T33
T39
T36
T35
T37 T38
T42 T43
T46
T45
T44
T47
相關(guān)PDF資料
PDF描述
HYB25R128160C 128-MBit Direct RDRAM(128 M位直接RDRAM)
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參數(shù)描述
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HYB3116160BSJ-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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HYB3116160BSJ-70 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BST-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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