參數(shù)資料
型號： HYB25M128160C
廠商： SIEMENS AG
英文描述： 128-Mbit direct RDRAM(128 Mbit 直接 RDRAM)
中文描述： 128 - Mbit的直接的RDRAM（128兆直接的RDRAM）
文件頁數(shù)： 64/93頁
文件大小： 919K
代理商： HYB25M128160C
Direct RDRAM
128/144-MBit (256K
×
16/18
×
32s)
Data Book
64
2.00
Figure 49
NAP Entry/Exit Windows (left) and PDN Entry/Exit Windows (right)
Refresh
RDRAMs, like any other DRAM technology, use volatile storage cells which must be periodically
refreshed. This is accomplished with the REFA command.
Figure 50
shows an example of this.
The REFA command in the transaction is typically a broadcast command (DR4T and DR4F are both
set in the ROWR packet), so that in all devices bank number Ba is activated with row number REFR,
where REFR is a control register in the RDRAM. When the command is broadcast and ATTN is set,
the power state of the RDRAMs (ATTN or STBY) will remain unchanged. The controller increments
the bank address Ba for the next REFA command. When Ba is equal to its maximum value, the
RDRAM automatically increments REFR for the next REFA command.
On average, these REFA commands are sent once every
t
REF
/2
BBIT+RBIT
(where BBIT are the
number of bank address bits and RBIT are the number of row address bits) so that each row of each
bank is refreshed once every
t
REF
interval.
The REFA command is equivalent to an ACT command, in terms of the way that it interacts with
other packets (see
Table 12
). In the example, an ACT command is sent after
t
RR
to address b0, a
different (non-adjacent) bank than the REFA command.
A second ACT command can be sent after a time
t
RC
to address c0, the same bank (or an adjacent
bank) as the REFA command.
Note that a broadcast REFP command is issued a time
t
RAS
after the initial REFA command in order
to precharge the refreshed bank in all RDRAMs. After a bank is given a REFA command, no other
core operations (activate or precharge) should be issued to it until it receives a REFP.
It is also possible to interleave refresh transactions (not shown). In the figure, the ACT b0 command
would be replaced by a REFA b0 command. The b0 address would be broadcast to all devices, and
PDN exit
NAP exit
+ (2 + NAPX)
no entry to NAP or PDN
if NSR = 1
CMD
5
8
23
NU1
NU1
t
t
=
=
NU0
t
=
CYCLE
CYCLE
t
CYCLE
*
*
t
*
t
- (0.5
0
1
SCYCLE
) if NSR = 0
SCYCLE
t
*
t
*
NU0
t
NU1
no exit
t
0
CMD
SCYCLE
PDNX)
no entry to NAP or PDN
SCYCLE
SCYCLE
t
SCYCLE
5
8
23
PU1
PU1
t
t
=
=
PU0
t
=
*
*
t
*
t
0
*
if PSR = 1
+ (2 + 256
- (0.5
t
*
1
PU0
t
SPT04235
PU1
no exit
) if PSR = 0
*
SCYCLE
t
t
0
ROW2...
ROW0
CTM/CFM
ROW0
ROW2...
CTM/CFM
SCK
T2
T0
T1
T3
T4
T6
T5
T7
T18
T13
NAP entry
T10
T8
T9
T11 T12
NAPR
T14 T15
T17
T16
T19
SCK
T10
T2
T3
T4
T6
T5
T7
T9
T8
PDN entry
NAPR
T13
T11 T12
T14 T15
T17
T16
T18 T19
相關(guān)PDF資料
PDF描述
HYB25R128160C 128-MBit Direct RDRAM(128 M位直接RDRAM)
HYB 25M144180C 144-MBit Direct RDRAM(144 M位直接RDRAM)
HYB25R144180C 144-Mbit direct RDRAM(144 Mbit 直接 RDRAM)
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HYB3118160BST-70 1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB3116160BSJ 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BSJ-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BSJ-60 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BSJ-70 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BST-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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