參數(shù)資料
型號： HYB25M128160C
廠商： SIEMENS AG
英文描述： 128-Mbit direct RDRAM(128 Mbit 直接 RDRAM)
中文描述： 128 - Mbit的直接的RDRAM（128兆直接的RDRAM）
文件頁數(shù)： 18/93頁
文件大?。?/td> 919K
代理商： HYB25M128160C
Direct RDRAM
128/144-MBit (256K
×
16/18
×
32s)
Data Book
18
2.00
ROW-to-ROW Interaction
(cont’d)
Cases RR13 through RR16 summarize the combinations of two successive PRER commands. In
case RR13 there is no restriction since two devices are addressed. In RR14,
t
PP
applies, since the
same device is addressed. In RR15 and RR16, the same bank or an adjacent bank may be given
repeated PRER commands with only the
t
PP
restriction.
Two adjacent banks can’t be activate simultaneously. A precharge command to one bank will thus
affect the state of the adjacent banks (and sense amps). If bank Ba is activate and a PRER is
directed to Ba, then bank Ba will be precharged along with sense amps Ba-1/Ba and Ba/Ba+1. If
bank Ba+1 is activate and a PRER is directed to Ba, then bank Ba+1 will be precharged along with
sense amps Ba/Ba+1 and Ba+1/Ba+2. If bank Ba-1 is activate and a PRER is directed to Ba, then
bank Ba-1 will be precharged along with sense amps Ba/Ba-1 and Ba-1/Ba-2.
A ROW packet may contain commands other than ACT or PRER. The REFA and REFP commands
are equivalent to ACT and PRER for interaction analysis purposes. The interaction rules of the
NAPR, NAPRC, PDNR, RLXR, ATTN, TCAL, and TCEN commands are discussed in later sections
(see
Table 8
for cross-ref).
Table 11
ROW-to-ROW Packet Interaction - Rules
Case # ROPa
Da
Ba
Ra
ROPb
Db
Bb
Rb
t
RRDELAY
Example
RR1
ACT
Da
Ba
Ra
ACT
/= Da
xxxx
x…x
t
PACKET
Figure 11
RR2
ACT
Da
Ba
Ra
ACT
== Da /= {Ba, Ba+1, Ba-1} x…x
t
RR
== Da == {Ba+1, Ba-1}
Figure 11
RR3
ACT
Da
Ba
Ra
ACT
x…x
t
- illegal unless
PRER to Ba/Ba+1/Ba-1
Figure 10
RR4
ACT
Da
Ba
Ra
ACT
== Da == {Ba}
x…x
t
- illegal unless
PRER to Ba/Ba+1/Ba-1
Figure 10
RR5
ACT
Da
Ba
Ra
PRER
/= Da
xxxx
x…x
t
PACKET
Figure 11
RR6
ACT
Da
Ba
Ra
PRER
== Da /= {Ba, Ba+1, Ba-1} x…x
t
PACKET
== Da == {Ba+1, Ba-1}
Figure 11
RR7
ACT
Da
Ba
Ra
PRER
x…x
t
RAS
x…x
t
RAS
x…x
t
PACKET
x…x
t
PACKET
Figure 10
RR8
ACT
Da
Ba
Ra
PRER
== Da == {Ba}
Figure 15
RR9
PRER
Da
Ba
Ra
ACT
/= Da
xxxx
Figure 12
RR10
PRER
Da
Ba
Ra
ACT
== Da /= {Ba, Ba±1,
Ba±2}
Figure 12
RR10a PRER
Da
Ba
Ra
ACT
== Da == {Ba+2}
x…x
t
/
t
if Ba+1 is
precharged/activated.
–
RR10b PRER
Da
Ba
Ra
ACT
== Da == {Ba-2}
x…x
t
/
t
if Ba-1 is
precharged/activated.
–
RR11
PRER
Da
Ba
Ra
ACT
== Da == {Ba+1, Ba-1}
x…x
t
RP
x…x
t
RP
x…x
t
PACKET
Figure 10
RR12
PRER
Da
Ba
Ra
ACT
== Da == {Ba}
Figure 10
RR13
PRER
Da
Ba
Ra
PRER
/= Da
xxxx
Figure 12
RR14
PRER
Da
Ba
Ra
PRER
== Da /= {Ba, Ba+1, Ba-1} x…x
t
PP
== Da == {Ba+1, Ba-1}
Figure 12
RR15
PRER
Da
Ba
Ra
PRER
x…x
t
PP
x…x
t
PP
Figure 12
RR16
PRER
Da
Ba
Ra
PRER
== Da == Ba
Figure 12
相關(guān)PDF資料
PDF描述
HYB25R128160C 128-MBit Direct RDRAM(128 M位直接RDRAM)
HYB 25M144180C 144-MBit Direct RDRAM(144 M位直接RDRAM)
HYB25R144180C 144-Mbit direct RDRAM(144 Mbit 直接 RDRAM)
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HYB3116160BSJ-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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HYB3116160BSJ-70 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BST-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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