參數(shù)資料
型號(hào)： HYB25M128160C
廠商： SIEMENS AG
英文描述： 128-Mbit direct RDRAM(128 Mbit 直接 RDRAM)
中文描述： 128 - Mbit的直接的RDRAM（128兆直接的RDRAM）
文件頁(yè)數(shù)： 65/93頁(yè)
文件大?。?/td> 919K
代理商： HYB25M128160C
Data Book
65
2.00
Direct RDRAM
128/144-MBit (256K
×
16/18
×
32s)
would be {Broadcast,Ba+2,REFR}. Note that the bank address should skip by two to avoid adjacent
bank interference. A possible bank incrementing pattern would be: {13, 11, 9, 7, 5, 3, 1, 8, 10, 12,
14, 0, 2, 4, 6, 15, 29, 27, 25, 23, 21, 19, 17, 24, 26, 28, 30, 16, 18, 20, 22, 31}. Every time bank 31
is reached, the REFA command would automatically increment the REFR register.
A second refresh mechanism is available for use in PDN and NAP power states. This mechanism
is called self-refresh mode. When the PDN power state is entered, or when NAP power state is
entered with the NSR control register bit set, then self-refresh is automatically started for the
RDRAM.
Self-refresh uses an internal time base reference in the RDRAM. This causes an activate and
precharge to be carried out once in every
t
REF
/2
BBIT+RBIT
interval. The REFB and REFR control
registers are used to keep track of the bank and row being refreshed.
Before a controller places an RDRAM into self-refresh mode, it should perform REFA/REFP
refreshes until the bank address is equal to the maximum value. This ensures that no rows are
skipped. Likewise, when a controller returns an RDRAM to REFA/REFP refresh, it should start with
the minimum bank address value (zero).
Figure 50
REFA/REFP Refresh Transaction Example
Current and Temperature Control
Figure 51
shows an example of a transaction which performs current control calibration. It is
necessary to perform this operation once to every RDRAM in every
t
CCTRL
interval in order to keep
the
I
OL
output current in its proper range.
BBIT + RBIT
/2
a1 = {Broadcast, Ba}
DQA8...0
DQB8...0
Transaction a: REFA
Transaction a: REFA
Transaction b: XX
Transaction c: XX
d0 = {Broadcast, Ba+1, REFR}
c0 = {Dc, ==Ba, Rc}
b0 = {Db, /={Ba, Ba+1, Ba-1}, Rb}
a0 = {Broadcast, Ba, REFR}
t
REF
REFR = REFR8...REFR0
REFB = REFB3...REFB0
BBIT = #row address bits
BBIT = #bank address bits
SPT04236
T24
REFP a1
CTM/CFM
COL4...COL0
ROW2...
ROW0
REFA a0
T2
T0
T1
T3
T4
t
RR
ACT b0
t
RAS
t
RC
T14
T7
T5
T6
T8
T9
T12
T10 T11
T13
T19
T17
T15 T16
T18
T20 T21
T23
T22
T44
REFA d0
ACT c0
RP
t
T34
T29
T25 T26
T28
T27
T30 T31
T33
T32
T35 T36 T37
T41 T42 T43
T46
T45
T47
相關(guān)PDF資料
PDF描述
HYB25R128160C 128-MBit Direct RDRAM(128 M位直接RDRAM)
HYB 25M144180C 144-MBit Direct RDRAM(144 M位直接RDRAM)
HYB25R144180C 144-Mbit direct RDRAM(144 Mbit 直接 RDRAM)
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HYB3118160BST-70 1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB3116160BSJ 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BSJ-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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HYB3116160BSJ-70 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
HYB3116160BST-50 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16-Bit Dynamic RAM 1k & 4k -Refresh
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